EMI in Your High Speed Design: Understand the Signal Rise Time
Kids these days have no idea why electromagnetic signal coupling between nearby circuits is called “crosstalk.” Back when phones plugged into the wall and they didn’t include a touch screen or internet access, it was possible to hear faint whispers of other conversations bleed through into your phone line. High speed PCBs experience the same type of problem with crosstalk, and it's related to the behavior of digital signals propagating on traces in the board.
Understanding crosstalk and EMI in general, whether within a PCB or from some external source, requires understanding how the signal in one trace interacts with another trace. If you can evaluate crosstalk in a real high speed design, it's easy to determine how the design should change to reduce EMI and crosstalk. There are a few rules of thumb that will work fine on moderate speed designs, but it helps to use simulations to better understand how your high speed designs will experience crosstalk before you go through a board spin.
Breaking Down the Term “High Speed Design”
We've pointed this out elsewhere on this blog, but it deserves to be stated again here: a high speed design does not mean high clock frequency or high data rate. High speed signals have fast rise time, meaning a fast transition between two voltage levels. The same applies to multi-level signals, where there is a very fast transition between the various signal levels. A faster signal rise/fall time can create stronger EMI problems, particularly crosstalk, in various portions of a PCB. This is true even if the system clock frequency is quite low. A faster clock frequency just means that any disturbances due to EMI will occur more often.
The major EMI problems in a high speed design include:
- Crosstalk, primarily due to inductive coupling at low frequencies and due to capacitive coupling at much high frequencies
- Radiated EMI, where EMI from digital signals is radiated over a broad range of frequencies spanning from DC up to multiple harmonics of the system clock
- Power bus glitches, which includes supply bounce and power bounce, creating ripples in the DC ripple as measured between the power rails and ground
- Conducted EMI, where noise on one interconnect is connected elsewhere into another component, circuit, or interconnect, although this is less of a problem in digital components
Note that the same effects arise with differential pair routing, leading to differential mode crosstalk and EMI. These aspects of EMI in high speed digital PCBs all relate to the rise/fall time of a signal transition.
EMI and Switching Speed
These all relate to the signal switching speed in a PCB. These aspects of EMI become challenging in high speed design because of the bandwidth of a typical digital signal. Power in a digital signal is concentrated from DC up to very high (technically infinite) frequencies. In particular, a rough approximation is that 70% of the power is concentrated from DC up to the knee frequency, which is equal to approximately one-third of the inverse of the signal rise/fall time (from 10% to 90%).
Power spectral density of an example digital signal.
All this means that, when the rise time is faster, EMI is more intense. Since you generally can't just opt for slower components in any situation, designers need to take some simple steps to suppress EMI in a high speed design.
High Frequency Analog vs. High Speed Digital Signaling
Many engineers I have taught in the past do not think of digital signals as waves, rather they look at digital signals as being either on or off, where the electric field exists everywhere throughout the interconnect that carries the digital signal. At very low interconnect lengths, this is technically correct, but it does not mean that short interconnects exhibit more or less EMI. The rising signal transition still creates EMI at a range of frequencies, rather than at a single frequency.
Compared to digital signals, analog signals are simple. The main factor to concern yourself with is the signal frequency and propagation delay due to the finite speed of electromagnetic waves. A comparison between the oscillation period (i.e., inverse of the signal frequency) and the propagation delay in a given interconnect determines whether you need to worry about transmission line behavior and whether trace termination becomes critical.
Potential Solutions: There is No Magic Bullet
While EMI in high speed digital signaling cannot be removed completely, it can be suppressed using a number of methods:
- Trace sizing: Routing critical traces directly over a ground plane and using slightly wider traces reduces loop inductance, which reduces the amount of generated and received crosstalk
- Grounded copper: A grounded trace can be routed between aggressor and victim traces on the PCB, which can provide about 20 dB reduction in crosstalk. Note that this ground trace must correspond to the ground reference for both the aggressor and victim traces. Grounded polygon pour can also be used to fill in space between traces and different circuit blocks.
- Isolation structures: Some unique structures on the surface layer of a PCB can provide isolation at very high frequencies. These structures can be as simple as grounded copper walls around critical circuit blocks, or complex electronic band gap structures used in modern smartphones.
- Internal layers: Don't be afraid to route on internal layers, but be sure to apply your impedance control design rules to ensure the internal striplines will have the right impedance.
Blue PCB with dense traces
Trying to suppress EMI in high speed design due to crosstalk presents a number of challenges. Fortunately, you can verify that your routing will not experience excessive crosstalk when you use the industry's best PCB design tools found in Altium Designer®. You’ll have access to the best PCB design and layout tools that help automate routing and board documentation, and you'll have access to signal integrity analysis tools that help you design with EMI immunity in mind.