PDN Impedance Measurement For Power Subsystem Design
When it comes to today’s complex multilayer, high-speed PCB designs, one of the most critical aspects of the product development process focuses on power subsystem design. For that portion of the design, the goal is to make the PDN impedance as low as possible (a few milliOhms) across a broad range of frequencies. While determining that the PDN impedance of the power subsystem adequately meets the final PCB’s performance parameters, there are specific elements that are addressed during the testing process:
- Creating the access test points on the PCB used for a PDN impedance measurement.
- Creating the PDN impedance versus frequency test setup.
- Creating custom-made test probes.
This article will describe these elements and how they ensure that the power subsystem impedance test process will reflect the final product’s actual performance.
The PDN Impedance Measurement Challenge
The main dilemma surrounding the PDN impedance measurement process (and other power integrity measurements) is that product developers don’t always know the signal bandwidth that ICs on a PCB will require. As a result, that impedance has to be made low from DC all the way out to 10's of GHz. This is achieved by building a PCB with a stackup that matches the stackup for your intended design. It should also include the capacitors you intend to use in your PDN placed in their intended locations. You then need to measure the impedance vs. frequency for the entire board.
Figure 1 illustrates how to design the access points used to measure the impedance of the power supply and the bypass capacitors.
This test verifies that the decoupling capacitor population is correct for each power plane, or for each power supply voltage if multiple supplies are used in the same board. Two of these access points are required for each power supply input or power plane. These two structures should be placed at least one inch apart and then labeled with the voltage to which they connect. The first point allows a signal to be injected into the plane capacitor while the second allows for the measurement of the resulting voltage. These access points are designed such that they will allow for special low inductance probes (more about these probes below) to make the connections from the board to a spectrum analyzer that will be used to perform the actual tests. The stickers in Figure 2 show access points for test probes in an example PCB.
A spectrum analyzer with a tracking signal generator is used to gather Z vs. F (PDN impedance versus frequency) measurement, as is shown in Figure 3.
The output from the tracking signal generator is used to inject the constant current noted above. Data displayed on the screen of the spectrum analyzer is set up to be displayed in volts, and it is proportional to the PDN impedance.
The aforementioned ultra-low inductance, ultra-low impedance test probes are shown in Figure 4. They are built from a short piece of SR 141 semi-rigid coaxial cable with a male SMA connector on one end and a short piece of stiff wire (sewing needles work) on the other.
Once the data has been obtained from the spectrum analyzer, the engineer performing the test uses the injected current to convert the measured voltage to impedance. Based on the outcome of that data, one can determine whether the impedance goals of the power subsystem design have been met.
If there are no test points on a board such as those shown in Figure 1, it will be necessary to sell coaxial cables to the locations that make contact with the two planes being measured. The best way to do this is to remove two 0603 capacitors and solder on the coaxial cables, as shown in Figure 5.
When soldering leads to the PCB, as shown in this figure, it is handy to have a quick way to disconnect the cables from the analyzer. The easiest way to do this is by using BNC connectors such as those shown in Figure 3. Figure 6 shows SMA adapters connecting to the test cables with probes on them. To measure the impedance versus frequency accurately, the connections must be far enough apart that the two paths don’t create some mutual inductance.
Now that differential signaling has gotten so easy, the most challenging aspect of current designs is getting the power delivery system right. One of the boards for which we recently provided consulting services had in excess of 200, 28 Gbps differential links. It took about a day for us to figure out how to deal with all those links. That same design had 29 different voltage rails; figuring out the current demand in each rail, delta(i), and ripple took almost a month.
With the stackup planner and routing tools in Altium Designer®, you can accurately design high speed PCBs and place test structures for gathering a PDN impedance measurement. The rules-driven design environment helps expedite high speed layout and routing, and integrated simulation tools help ensure your design stays within performance specs.
Talk to an Altium expert today to learn more or discover more about the advanced routing and design rule verification features in Altium Designer®.
- Ritchey, Lee W., and Zasio, John J., “Right The First Time, A Practical Handbook on High Speed PCB and System Design,” Volume 2.
- Ritchey, Lee W., Course Slides, “2-Day Signal Integrity and High Speed System Design,” training class.