Changing PCB Reference Planes During Routing in Multilayer Boards

Zachariah Peterson
|  Created: May 27, 2019  |  Updated: September 25, 2020

Vias for changing layers and PCB reference planes

Vias with annular rings for reaching an interior PCB layer

If you’re a new designer and you take a look at some boards in common electronic products, you may not even realize they are multilayer boards unless you know exactly where to look. The fact is that more complex devices simply do not allow every single trace to be placed on a surface layer, thus signals must be routed within an interior layer in order to make the desired connections.

With complex boards involving multiple signal, power, and ground layers, your routing strategy is critical to ensure signal integrity and tight coupling to a reference plane. If you use the right routing tools and implement the right strategy during design, you won’t need to implement difficult fixes to important signal integrity problems.

Routing Between Layers in Your Layer Stack

Ensuring your multilayer PCB works as intended requires designing the right layer stack. Your layer stack will have an important effect on signal integrity, particularly on EMI within your board and its susceptibility to external radiated EMI. This also determines whether the board can pass EMC checks once manufactured.

Your routing strategy and layer stack will need to complement each other. The right stackup can ensure your routing strategy will eliminate or minimize signal integrity problems. The right place to start is to consider your ground plane arrangement with respect to your signal layers. Each signal layer should be placed directly adjacent to a ground plane. It is important to place a ground layer between a surface signal layer and an interior signal layer as long as traces in the interior signal layer are routed to components on the surface layer. This ensures tight coupling to a PCB reference plane in both layers.

In the aforementioned arrangement, you can avoid many signal problems if you only route signals through a single ground layer. As the signal vertically traverses the ground layer through a via, it will remain coupled to the ground plane and its return signal will be induced in the ground plane. This ensures tight coupling throughout the route and minimizes the circuit’s loop inductance. This also reduces radiated EMI from traces by ~10 dB.

The same idea applies to routing through a via across power planes. Although, it is a good idea to place a power plane adjacent to its ground plane. This minimizes loop inductance, thus minimizing susceptibility to EMI and any currents induced in the ground and power planes. This also increases the capacitance between the planes, providing a low impedance return path for any high frequency conducted EMI in your power plane.

Routing Through Multiple PCB Reference Planes

The grounding situation becomes more complicated when routing through two or more ground layers in your layer stack. This situation is shown below where a signal routes from an interior layer to a surface layer (shown in the red arrow).

Here, the signal maintains tight coupling to a ground layer in the interior signal layer and the surface layer. However, during the transition from the interior to the surface, there is a region where the signal is not coupled to anything. You can place a via between the two ground planes to create a return path during the transition (see the blue arrow below).

Grounded via between two PCB reference planes

Placing a grounded via between PCB reference planes

If there is no return path, you suddenly have two problems. First, a return path will form  in the nearest grounded element with the lowest reactance. This is normally a bypass/decoupling capacitor, but it could also be a via that connects to a ground plane. This causes a very large loop inductance in the circuit as the via strongly radiates into the transition region.

Second, the larger loop area increases susceptibility to external radiated EMI and crosstalk via mutual inductance. If you have a single isolated route between two ground planes, you might not have to worry about EMI or crosstalk problems as long as you are working with low-level signals. If you make several of these transitions in a single area, you may need to place multiple vias between the planes, or improve your stackup and routing strategy.

Don’t Forget Your Routing Strategy

If you devise the right routing strategy for each signal net before designing your stackup, you can eliminate the need to route through multiple planes when transitioning between a surface and an interior signal layer. Be careful when using an autorouter; a high-quality autorouter will let you define specific layer transitions as part of your routing strategy, which ideally prevents the need to route through multiple reference planes.

One area where you will need to consider the relationship between vertical routing and your stackup is when designing a BGA fanout strategy. With low pin count components, where pins are arranged in four rows along the edge of a component (see the image below), a simple dog bone fanout strategy is sufficient and only requires crossing through a single ground layer. When working with higher pin count packages, you may have no choice but to use two or more ground layers for a single signal net. Be sure to consult the manufacturer’s data sheets and keep proper grounding to prevent signal integrity problems.

HDI routing to a BGA

Designing multilayer boards and implementing the right strategy ensures your board remains free of signal problems. Altium Designer contains the layer stack design, layout, and simulation features you need to design the best multilayer boards in a single interface.

Download your free trial of Altium Designer today to learn more about the industry’s best design, simulation, and verification features. Talk to an Altium expert today to learn more.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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