Determining the Parasitic Inductance of a DC to DC Converter
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In our discussions regarding PDS design, we have noted that the complexity and high data rates associated with a large number of PCBs being designed these days make them susceptible to any number of different disruptive elements that impede current flow. As noted, unwanted inductance comes from two main components in DC/DC converters: capacitors (called parasitic inductance or series inductance/ESL) and inductor/transformer coils (leakage inductance).
For capacitors and coils, manufacturers take measurements of unwanted inductance and publish information in datasheets for their parts. For DC/DC converter modules, this is often not the case. This means that calculating the parasitic inductance for these converters is incumbent on product developers. This article will describe how that process works and how it factors into the PDS's overall operation.
A DC/DC converter is a type of electric power converter, which is either an electronic circuit or electromagnetic device, that converts a source of direct current from one voltage level to another. It provides power and a low-frequency response to changes in load impedance, which is what occurs when a digital logic circuit in a downstream component switches. Both parasitic resistance and parasitic inductance are inherent in the previous components. In terms of providing stable DC power, parasitic inductance creates far more problems with power stability in two areas:
- Stability on the power rail, where ripple arises due to transients when a component switches and draws power from the supply;
- Ground bounce, where a transient back EMF is induced in the ground lead and any vias on an integrated circuit's ground connection.
These effects can be viewed in two ways: from a circuit model perspective and from an impedance perspective. In terms of PDN impedance, decoupling capacitors with different ESL values and capacitance values are combined to provide low impedance between the low-frequency point where the DC/DC converter cuts off to the high-frequency point where the PCB planes take over. The parasitic inductance from other elements in a converter (including leakage inductance from coils) effectively increase seen by signals traveling to the converter's output, creating stronger ripple when components draw current spikes.
A good starting point in determining the parasitic inductance of a DC/DC converter is through an impedance versus frequency measurement for the component. Figure 1 shows the measured output impedance vs. frequency curve for a quarter-brick DC/DC converter operating at maximum load. As noted in the intro to this article, some component manufacturers publish information such as this in their datasheets. For those that do not, measurements must be made. In Figure 1, the red curve shows the output impedance vs. frequency with a 42 μF output capacitor, while the blue curve is the same information with a 2147 μF capacitor on the output. As can be seen, the impedance vs. frequency curve is the same up to about 4000 Hz.
In Figure 1, the impedance between DC and 100 Hz is the converter's output impedance when its internal regulation circuit is fully operational. In this case, it is 1 milliohm. Up to 100 Hz for a load change of 1 ampere, the output voltage change or ripple would be 1 mV (millivolt). Above 100 Hz, the regulating circuit is less able to respond to load current changes, and the corresponding output voltage ripple will be higher. At these frequencies, the power supply begins to look like a voltage source with a small parasitic inductance in parallel. It is this inductance that needs to be included in the analysis of the overall power delivery system.
Once the above curve has been obtained, calculating the value of the inductance coming from the DC/DC power converter is a straightforward process. All that is required is to pick a point on the curve to the right of 100 Hz to get the impedance for a given frequency. Then, these two values can be plugged into the inductive reactance equation, Equation 1, to arrive at the inductance.
XL is the inductive reactance in ohms; f is the frequency in hertz, and L is the inductance in Henrys.
An important point to note here is that the output impedance of the DC/DC converter is assumed to be totally reactive, i.e., the impedance is an imaginary number. High quality DC/DC converter modules will only use components with low parasitic resistance, so this assumption is reasonable.
To make the math easy, a value of impedance that is a round number such as 10 milliohms is chosen. In this case, the frequency at which this value is achieved is approximately 3000 Hz. This results in inductance of 1.6 μH. It’s important to keep in mind that this is the inductance of the DC/DC converter before it is mounted on a PCB. The mounting structure will add more inductance. The methods for connecting the converter leads to the power planes of the PCB to minimize the inductance in this part of the path are discussed on page 131 of Volume 1 of the reference cited at the end of this article.
If there is inductance information as part of the data from a manufacturer’s data sheets, it’s important to approach it with some caution. The module used to produce the curve shown in Figure 1 had an impedance vs. frequency curve that showed the impedance at a fraction of a milliohm out to about 5 kHz in the manufacturer’s datasheet. The inductance that was calculated from that curve was about a fifth of that which was measured. The important thing to remember is that it is implied that the regulation would be good out to the 5 kHz. The regulation began to deteriorate at only 100 Hz. This could result in an impedance gap between 100 Hz and 3 kHz unless steps are taken (using very large capacitors) to bring the impedance down in this frequency range. Specifically, this gap is likely to cause problems in systems with processor cores that go from standby to active and begin drawing current into the PDN.
Figure 2 is the output impedance vs. frequency curve for a Synqor 100 Ampere DC/DC converter. If the target value of impedance is 1 milliohm, the frequency at this impedance is approximately 2 kHz, and the inductance value at this frequency is 80 nH. It should be noted that the impedance below this frequency dips to as low as 40 μOhms. This frequency dip is typical of very high-power converters.
The above impedance curve vs. frequency can be measured over a broad frequency range using a spectrum analyzer. Measuring the output impedance vs. frequency requires the construction of a test setup, as shown in Figure 3.
For the test setup in Figure 3 to work correctly, the structure needs to be placed close to the output of the converter module so that there is no influence from the PDN connecting the converter to downstream components. Here, a small resistor is used as the load in this setup with a value about 10% of the maximum rated load value.
To measure the ripple directly in the time domain, we use a switching transistor to measure the ripple produced by the converter during switching. A signal generator is used to force the transistor to switch, which draws transient current through the DC/DC converter module, and the parasitic elements produce transients at the output. The signal generator amplitude must be adjusted to produce the voltage so that it results in the load resistor fully switched onto the power supply. The ripple voltage across the supply output terminals can then be measured with an oscilloscope.
With a little math, the result of this test will be output impedance vs. frequency. Caution: It’s important to make sure that the inductance and resistance of the loop containing R1, Q1, and the DC/DC converter is kept low so that the results will be accurate.
Parasitic inductance is a far more significant cause of power stability problems and PDN resonances. This information on parasitic inductance is often not supplied as part of the data provided for DC/DC converter modules or the components used in DC/DC converters. As a result, product developers need to measure impedance versus frequency and build a test setup to determine the parasitic inductance in a DC/DC converter such that the PDN can provide stable DC power with highly damped ripple.
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- Ritchey, Lee W. and Zasio, John J., “Right The First Time, A Practical Handbook on High Speed PCB and System Design, Volumes 1 and 2”.