How to Design an IC Carrier PCB

Zachariah Peterson
|  Created: February 7, 2023  |  Updated: February 15, 2023
IC Carrier PCB

Let’s set the scene: you finished your PCB layout and sent the board off for fabrication. After successful fabrication, the board is sent off to an assembly facility, and the assembler is preparing your PCB for wave/reflow soldering. While preparing the board, they discover that one of your footprints is incorrect, and a component can’t be mounted to the PCB!

Sometimes, footprints end up being incorrect, and they simply aren’t caught in a design review. In addition, some components do not have a replacement part in a matching footprint, and any other available components might not match the pinout on the device.

How should you deal with this problem? Should you scrap the PCB? One solution is to design an IC carrier board that can translate between the incorrect footprint and your alternative chosen part. To see a design example, watch the video below, then keep reading to learn some of the particulars involved in IC carrier board design.


How to Use an IC Carrier PCB

An IC carrier PCB is a simple module that enables placement of a required component when there is an incorrect footprint on a PCB. The other instance where a carrier board can be used is when the package/land pattern for the intended component is correct, but an alternative part is needed due to low inventory, incorrect pinout, and 

Carrier boards are not typically used in production, and I would argue they should not be used in this way. Instead, they are prototyping tools that allow you to get a PCB assembly completed without having to scrap your set of bare boards.

  • Carrier PCB size - The carrier should only be as large as needed to fit onto the existing land pattern.
  • Mounting - The placement/mounting style could be castellated along the edges, through-hole, or SMD.
  • Complexity - The carrier board should be as simple as possible to minimize lead time and cost.

Ideally, the board should be a 2-layer PCB, it should not have excessively small drills, and the board should not require an extremely fine-line fabrication process. This is the best approach for a prototype scenario, where you need to get the carrier board fabbed and sent to the assembly house as soon as possible. Make sure to contact your fabrication house about their quick turn options so that you can proceed with the carrier board design as soon as possible, and make sure you are aware of the cost drivers in PCB fabrication to minimize the cost of your IC carrier.

Footprints in an IC Carrier

Schematics for an IC carrier board are very simple: just place two symbols for the components you want to translate in the IC carrier. An example is shown below, where the only components needed in the schematic are the two components being translated. The next important part is the footprints, which must be placed on the top and bottom sides to provide the required translation.

IC carrier PCB
Schematics for an IC carrier PCB are very simple, generally only involving two components.

Just for fun, it’s important to note that it is still possible to add additional components to these carrier board packages as needed. For example, if you find that the chosen package needs additional bypassing or decoupling capacitors, these could be added to the carrier board package if there is enough room on the substrate. Once the footprints are placed on each side of the board, it’s time to route between pads.

Routing Into a Carrier Board

There are three possible cases involving routing in the carrier board, depending on whether the packages and pinouts are matching between the translated components:

  • Packages don’t match, pinouts match (simple)
  • Packages match, pinouts don’t match (difficult)
  • Packages don’t match, pinouts don’t match (difficult)

The first case is very simple: a via can be dropped behind the each pad pair, and traces can be routed directly between the pads through the vias.

IC carrier PCB

I typically recommend using copper pour on both sides to provide the remaining ground connections and shielding unless there is some reason to omit this. Make sure to connect top and bottom pours with a few stitching vias.

In the other case, where the pinouts and/or packages do not match, it’s difficult to generalize a routing strategy. In some cases, there will simply be too many crossings to keep the board on two layers, especially if the translated components have high pin counts. Keep this in mind and make sure to get a valid stackup for your carrier board if you need more than two layers.

Verification in 3D

After the carrier board is designed and finalized, it’s a good idea to export the carrier board to a STEP file so that its placement region can be verified. The STEP file can then be imported into a 3D model of the board and placed in the target area to verify placement. The goal here is to check the region around the carrier board to ensure there are no collisions with other components. In addition, if there is a z-axis constraint, the carrier board with its top-side component model can be verified against an enclosure model.

IC carrier PCB
IC carrier board placement in 3D in its target location. In this example, there is plenty of clearance around the carrier board.

Whenever you need to quickly create and verify mechanical placement of an IC carrier PCB, use the 2D and 3D CAD tools in Altium Designer®. When you’ve finished your design, and you want to release files to your manufacturer, the Altium 365™ platform makes it easy to collaborate and share your projects.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2000+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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