How Material Characteristics Factor into High Speed PCB Signal Performance

Kella Knack
|  August 7, 2020
How Material Characteristics Factor into High Speed PCB Signal Performance

Evaluating laminates for a particular PCB implementation can be a complex, multilevel process, especially when it comes to the operation of key components on the board, such as high-speed differential pairs. This article will examine some of the factors that come into play with the evaluation process: materials with a low dielectric content versus materials that are low loss; comparing the advantages and disadvantages of each of them; taking into account trace widths and then based on measured data, making a final selection.


As noted in a variety of sources that address the PCB design and fabrication process, when it comes to laminate selection, there are a variety of material properties with which product developers need to be familiar. The more complex and the higher the PCB frequency, the more critical these properties become. They include:

  • How a material shrinks when it goes through the lamination process followed by the cool down process.
  • How a material behaves in the lamination cycle.
  • How material drills.
  • How material plates.
  • How the Dk or dielectric constant, eᵣ, varies across the various thicknesses of laminates and how it changes with frequency. The factors that come into play include:
  • The dielectric constants of materials, other than a vacuum, are compared to a vacuum.
    • This comparison results in an eᵣ that expresses the effects of these materials on velocity and capacitance as compared to a vacuum.
  • How the Df or loss tangent of the material affects the operation of the PCB.
  • This is the measure of how much of the energy in an RF signal is lost in the dielectric of the PCB.
    • When a material is referred to as being high speed this is the property that is being referenced.

How Do These Do These Properties Factor In?

The initial argument in favor of using a low Dk laminate for a complex PCB such as a backplane was that it could be thinner. The desire for wanting the backplane to be thin originated from it being easier to plate the holes so that the aspect ratio was lower, and it was better for hooking up structures such as press-fit connectors. Another argument was that if the vias were smaller (due to the boards being thinner), they had less capacitance to interfere with high speed signals. An additional consideration was that using a low Dk laminate would allow for wider traces resulting in lower copper losses.

A comparison study between a low Dk and a low DF material was made in terms of the foregoing parameters. The information within that study and its results are presented in the next section of this article.

What Are The Benefits Of A Low Dielectric Material?

The benefits of a low Dk laminate and what it delivers in terms of high-speed differential signals include:

  • As noted above, for a given trace width selected to produce a given impedance, the laminate used between the trace and its adjacent plane can be thinner, resulting in a PCB that is thinner overall.
  • For a given thickness of laminate selected to produce a given impedance, the trace width can be wider. This results in lower signal loss due to the skin effect loss in the trace.
    • Note: At very high frequencies, the conductor’s current flow ceases to flow uniformly through the whole cross-section of a conductor. Instead, it crowds near the surface. This is the skin effect loss phenomenon.

The foregoing benefits seem like they make a strong argument for using a low Dk material based on the following:

  • Equation 1, shown below, has often been used to calculate a surface microstrip transmission line’s impedance. It has been shown to be inaccurate with the dimensions used in modern PCBs, but it illustrates how Dk or eᵣ affects impedance.
    • The variables in the equation are: H = height above plane, W = trace width, T = trace thickness, eᵣ = relative dielectric constant or Dk, Zₒ = impedance in ohms.
    • Notice that lowering eᵣ results in higher impedance and, conversely, raising eᵣ results in a lower impedance.
    • If a lower eᵣ laminate is used, the trace width can be made wider for a given impedance, lowering the copper loss.
The Impedance Equation
Equation 1. The Impedance Equation

The Factors of Large, High Layer Count Backplanes That Make A Low DK Material Appear Attractive 

The larger, high-layer count backplanes used in today’s high-performance products where high-speed differential pairs abound, such as Internet core routers and switches, can be as thick as 400 mils (10 mm). This thickness presents a couple of different problems, including:

  • The drilling and plating of the through holes may be difficult.
  • The parasitic capacitance of these long, large holes may adversely affect signal quality at very high data rates necessitating “backdrilling” to remove most of the unwanted copper in the holes.

Note: With the high data rates of today’s products, there is no way to make a backplane thin enough to avoid having to do the backdrilling process.

A lower Dk laminate would reduce the thickness of the laminate needed to achieve the desired impedance and reduce the PCB’s overall thickness and the hole capacitance.

The trace width issues include:

  • From Equation 1, above, it can be seen that for a given height above the plane, a lower Dk laminate allows the use of a wider trace for a given target impedance.
    • As noted above, the motivation for using wider traces is to reduce the signal loss resulting from the “skin effect” phenomenon by increasing the trace’s surface area.

Based on the foregoing, it would seem that the use of low Dk laminates for those products containing high-speed backplanes that are characterized by high-speed differential signals, the decision to go with a low Dk laminate would be a “no brainer.” This is especially true when you factor in reducing the overall thickness of the PCB and having wider traces. But, as with most things in life, everything that has a lot of advantages also has some disadvantages. In the case of low Dk laminates, the issues are cost (low Dk laminates are more expensive), there are limited supply sources, and the lead times are protracted. As has been seen with the recent impact of COVID-19 on the industry, any or all of these issues can significantly affect the final outcome (TTM) and cost of the product (which at some point and in some manner needs to be shifted to the customer).

What If There Is Another Approach?

Based on the balance of the advantages and disadvantages associated with low Dk laminates, it’s worth entertaining an alternate approach to the foregoing. That approach is found through the use of low loss materials. Loss tangent or Tan (f) expresses the amount of energy in the electromagnetic field traveling through a dielectric that is absorbed by that dielectric. And the amount of energy absorbed increases with frequency.

To ascertain the performance characteristics between low Dk and low Df laminates, we performed the following analysis.

The curve in Figure 1 shows the reduction in the copper loss vs. change in a trace width of a 33” (84 cm) stripline signal path when the trace width is varied from 5 mils (127 microns) to 10 mils (254 microns). As can be seen, there is little difference between the two trace widths. Certainly not enough to result in a substantial improvement.

Copper Loss Vs. Trace Width of a 33” Stripline Signal Path. Trace Width Variation, 5 Mils and 10 Mils
Figure 1. Copper Loss Vs. Trace Width of a 33” Stripline Signal Path. Trace Width Variation, 5 Mils and 10 Mils

Next, Figure 3 shows the stackup for a 22-layer board having 4 mil (101 microns) wide stripline traces on a board that is 106 mils (2.56mm) thick.

22-layer, 106-mil (2.56 mm) Thick Board with 4-mil (106 microns) Wide Stripline Traces
Figure 3. 22-layer, 106-mil (2.56 mm) Thick Board with 4-mil (106 microns) Wide Stripline Traces

Now, we compare Figure 3 to Figure 4, which is the stack up for a 22-layer board with 8-mil wide stripline traces on a PCB that is 160 mils (4mm) thick.

22-Layer, 160-mil (4.4 mm) Thick Board with 8-mil (203 microns) Wide Stripline Traces
Figure 4. 22-Layer, 160-mil (4.4 mm) Thick Board with 8-mil (203 microns) Wide Stripline Traces

Based on the information provided in Figures 1, 2, 3, and 4, we can conclude the following:

  • If one examines the loss change at 2.5 GHz, roughly 5 Gb/S by changing the trace width from 5 mils to 10 mils (possible only by reducing the Dk by more than half), it yields only 1 dB improvement over a path that is 33” (84 cm) long. This is not a substantial gain.
  • If one examines the loss change at the same frequency by using a moderately lower loss laminate, the reduction in loss is 2 dB.
    • If one of the newer ultra-low loss laminates is used, the improvement at 2.5 GHz is more than 6 dB.
  • Figure 3 shows that increasing the trace width from 4 mils to 8 mils increases the thickness of the 22-layer PCB by 60%.
  • Using a low Dk laminate to enable the use of wider traces does not result in significant improvements in loss.
  • Using a low loss laminate results in a thinner board overall rather than reducing loss by making traces wider and using a low DK laminate. It also delivers substantial performance improvement.

The two most obvious factors that are reflected by choosing a low Df laminate versus a low Dk low laminate are very straightforward: There are many sources readily available for the low Df laminates and are significantly less expensive than low Dk laminates. But, more importantly, they deliver better performance.


With today’s complex, high speed boards, product developers are always seeking ways to improve the product’s overall performance. Often, the assumption is that using a low Dk laminate and increasing the traces’ width will significantly improve overall performance. Dk laminates are single-sourced, are more expensive, and have a protracted lead time. However, detailed analysis has shown that a much better way to improve performance is to use a less expensive, more widely available low Df laminate that also delivers significant performance improvements.

Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium and learn more about making design decisions with ease and confidence. 

About Author

About Author

Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

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