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PCB Design Process Concepts

John Medina
|  Created: February 3, 2019  |  Updated: April 17, 2020

Have you ever seen a architectural masterpiece like the Golden Gate bridge or maybe an historic building like the Paris’ Notre Dame Cathedral? Then wondered how they came up with that idea and how they executed? A few words come to mind: Planning, planning and adjusting.

PCB and SOC Package Design is sort of like that, meaning it is truly a puzzle of parts, circuit interfaces, power planes, thousands of signals, via transitions and many design rules that need to come together and perform electrically sound, have required performance, and also be able to work with the constraints and limitations of mechanical form factors.

The Building Blocks of PCB Design

The importance of following a good Input checklist

Having an input checklist makes the engineer think and creates a form of communication that is documented and basically gets the ball rolling. The checklist can define many things and gives us a starting point to begin our PCB Design journey. It is also a time to get the engineer to reflect on what he is looking for in the design. Thus far the  engineer is thinking electrically in most cases having been buried in schematic and part searching (hopefully), this is now the time to start getting physical, LOL. Meaning, start thinking about how electrons will flow on a PCB and what is required.

I have a checklist I use and it contains the basics. The more designs you do, the more this comes down to muscle memory. If you are the engineer doing the layout, the more your mind will bend to now think like a PCB Designer. For example, you may now think more in terms of reference designators rather than part numbers. It is early on that you would do a feasibility study and the inputs checklist kicks off that phase. The basic items needed are BOM, mechanical input, Routing/Design rules, overall thickness, impedance requirements, and smallest pitch parts to be considered to help define via structures required, do the BGA Math.

Mechanical collaborations – keepouts and height restrictions

Collaborating with MCAD is essential to start a project. It is important to be on the same page with mechanical requirements from the start. Overall board thickness, connector locations/rotations, placement keepouts, and mounting holes must be defined precisely and considered early in PCB Design. This is the foundation of the building you are about to build. The framework are the physical constraints and dimensions available to fit the design, so you can see the accuracy is critical to the success of the design. I have seen in the past, a mechanical board outline come from MCAD showing bottom view and going into ECad as top view, This will affect part placement, don't do this. Be sure your views are correct and whenever possible share .idf or .idx files and include same step model files if you have that ability. This will insure successful MCAD collaboration. Also, it may be a time to negotiate where heat sinks mounting holes can be moved to, but part placement will also dictate limitations. If for instance, it is suggested to put your high pin count BGA in the corner, and it is fully populated with signals, now is the time to push back because you will be stuck trying to route out of a corner and need more signal layers.

The importance of routing rules

Routing or Design rules are what keep the PCB Design in check. I often refer to documented rules as the train tracks that a train must roll on. WIth rules defined in one document vs. many emails that change daily or hourly, and hard to keep track of, it is very easy to get off track and miss or forget items that are critical to the performance of design, and allows the PCB Designer to communicate as one and provides legacy documentation. The idea of rules in document form is what is used to populate rules in CAD tools, often referred to as constraints or design rules, that the design must adhere to. This includes physical and electrical rules that the design will follow in order to meet timing, noise and manufacturing requirements.

High speed routing and simulations - Power delivery concepts

Now that the design is starting to take shape, rules are in place, and placement and power planes are being defined, it is a good time to layout the most critical interfaces and most challenging high speed circuits if they exist on your design. It is a good idea to have a stackup in mind that works for the whole design. Using standard via size and trying to achieve a good yield aspect ratio, it is time to test out that circuit, place and route, then simulate. Yes, simulate now once critical nets are routed just to see if you meet requirements for optimal performance. It is at this point you may find out you need to have a different stackup or via configurations. For instance, if you’re trying to achieve 12GBPS, and you’re using a thru hole via on an 18 layer .093 thickness board, you may find that the via stubs are causing too much reflection to achieve performance. You may need to consider another option like blind and buried vias or back drilling or different board stackup and interface choices.

These four steps I describe above should provide the stepping stones to successfully building framework for a successful PCB design. My experience following these steps has helped produced consistent results. I believe it is important to lay down the framework first. Next steps, was the simulation successful? Did you need to change PCB Design board configuration or perhaps via structures or via sizes or fabrication materials with lower Dk and lower loss? You can learn alot from simulations and that will help pave the road forward.

All these items should fall out once simulations or calculations have occurred and after initial critical routing/tuning of high speed interfaces. So if all works, what is next in the process? Where do we go from here? Confirm stackup? Organization of design?

That is what I will discuss in Part 2:

  • Stackup definition per technology - Trace widths targets
  • Organizing your nets and constraints and class to class rules and over constraining.
  • Floorplanning per design rules
  • The use of Via patterns/placement for transition and planning of routing
  • Advanced level SOC Chip design and how to plan for PCB Design using a SIP or SOC.

Thanks for your attention. I will end here and I am open to your comments and feedback.

Happy PCB Designing…

About Author

About Author

With over 30 years of extensive experience in PCB and Package design,
training and Signal integrity analysis using state of the art tool sets,
including Expedition, CES (Constraint Editor System), Altium, Hyperlynx,
Interconnectix (ICX), Power SI,  Boardstation RE/XE and Allegro v16.x
including CMS (Constraint Management System).
John has expertise in complex PCB designs, and delivering training of PCB design tools and methodologies, including: HDI, high speed, RF, mobile wireless products, mixed technology designs, signal and power integrity verification and analysis
using Hyperlynx tool suite, and Hyperlinx DRC.
John has worked at Northrop Grumman completing PCB designs for Aerospace
and Military products and has previously worked for Apple, HP, Agilent, Nokia and
Cisco and built teams that deliver complex HDI CPU designs. He has also implemented a PCB Process and tool flows, which includes SI Tools for verification and worked at Intel doing Package Flip-Chip design for server team.
Recently John worked for Mentor Graphics as a Field Application Engineer. He supported Qualcomm, Northrop Grumman and Intel providing expertise and training for
Package/PCB co-design utilizing Xpedition Package Integrator. He has experience with Calibre LVS DRC. John also has a pending patent on Bump Compensation methodology.

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