Pros and Cons of Advanced Electronic Packaging for PCB Designers

Zachariah Peterson
|  Created: September 28, 2022  |  Updated: September 29, 2022
Pros and Cons of Advanced Electronic Packaging for PCB Designers

Our guest Phil Marcoux is very well-known in the advanced electronic packaging community and currently working as a business mentor in the electronics industry. 

Phil is labeled as the father of SMT by the IPC. He is a Charter member of SMT Council, granted the IPC President's Award, past owner of over 40 integrated circuit packaging and camera module-related patents, and consultant on numerous heterogeneous designs and standards, just to name a few of his excellent achievements.

Today we will tackle the pros and cons of heterogeneous electronic assemblies and what we can do as an industry to move forward with it.

Listen to Podcast:

Download this episode (right-click and save)

Watch the Video:

Show Highlights:

  • Learn about Phil Marcoux and his upcoming panel discussion at PCB West 
    • The panel will discuss “How Heterogeneous Integration Affects the PCB Industry.”
    • Phil is looking forward to promoting PCEA and the need to embrace education
  • PCB designers must recognize what compromises they will have to make to utilize that chiplet
    • One of the challenges is to encourage companies to work together and to agree to a standardized chiplet format
  • The funding from the federal government may motivate companies to embrace the heterogeneous type of format and the chiplet format.
  • Many defense contractors, military products, and advanced electronic products are now rapidly depending on the need for heterogeneous designs
    • Other significant drivers in the market include medical devices, telecommunications, and 5G products
  • Most design software are fully capable of handling heterogeneous integration
    • PCB designers can very quickly jump in. Many structures in a printed circuit board, especially in HDI designs, are also used in advanced packages.

Links and Resources:

Claim the special offer for Podcast listeners only

Transcript:

Zach Peterson:
Hello everyone and welcome to the Altium OnTrack Podcast. I'm your host, Zach Peterson, and today I'll be talking with Phil Marcoux, formerly working in the advanced electronic packaging community and currently working as a business mentor in the electronics industry. Phil, thank you so much for joining us today.

Phil Marcoux:
Oh, my pleasure.

Zach Peterson:
So we wanted to have you on because first of all, you have a long, distinguished career and I love getting the experience and the story from some folks who've been working in this industry for quite a long time. But also you'll be running a panel discussion at PCB West first week of October. Could you give us kind of the high level overview of the panel discussion?

Phil Marcoux:
Well, the panel is labeled as talking about the problem issues with heterogeneous electronic assemblies. But in reality, what I'm targeting the panelists and myself to discuss and get questions from the audience is what are the educational obstacles and the obstacles that your audience envisions that they have that prevents them from designing the substrates for heterogeneous electronics? Many of us on the advanced packaging side are a bit frustrated that many of the PC board designers are not taking advantage of the skillset that they have to design the more advanced substrates and to provide, one, their customers the advantages of the heterogeneous products. As well as to take advantage of their own personal gain and financial gain by moving into that environment. So the panel is going to be more to promote people moving their design skills rather than talking about the specific technical attributes.


Also, my other motivation is to promote the existence of the PCEA, which I was most excited to see come into existence a couple years ago. And I've known Mike Buto a couple of the others for many, many years, and felt that the educational needs were lacking from other quarters and seeing that the PCEA could rise to that challenge, joining them to be an advisor. And that's my capacity with them. I want to nudge them to continue to provide more education, more confidence building for designers to move into this advanced packaging area.


One of the reasons that I have chosen the panelists that I have is because I think they represent well not only participants in the heterogeneous area that may not have necessarily participated in PCB type activities in the past, but they also are people that certainly embrace the need for the education. But more importantly, they embrace a set of resources that any designer is going to be welcome to go to and get answers, non obligatory answers. The one panelist that I have, Rosie Medina, I may need to throw some cold water on her because she may get over exuberant as far as trying to explain some of the things that designers have done wrong and how they can do them right. But nonetheless, I think the panelists that I'm chosen are going to be an exciting group of people.

Zach Peterson:
Sure. Just to back up for a moment, your background is pretty extensive and I think you're pretty well known in the packaging area. I think packaging is one area of semiconductor design that sometimes gets overlooked. And just to run over your background real quick, you were labeled the father of SMT by the IPC, that's pretty distinguished. Charter member of SMT Council. You were granted the IPC President's Award, past owner of over 40 integrated circuit packaging and camera module related patents, consultant on numerous heterogeneous designs and standards. I mean, I could keep going. So to anyone that's interested in reading the biography, I invite you to look at the show notes. But I think what I'm interested in learning is kind of how did we actually get to this point where we have found this need to maybe move away from the typical packaging methods that we have for semiconductors and then get into this area where we have these substrates. And then how did heterogeneous integration come about and how have the two areas kind of interplayed with each other?

Phil Marcoux: 
Well, ever since day one when the first semiconductor was made, the packaging has always been viewed as a ugly evil. If it wasn't for the need to protect it environmentally, if it wasn't for the need to have it tested over some pretty rigorous environments, if there wasn't the need to keep people's fingers away from these things, we would not need the packages. Now, many, many years have gone into development for techniques that, oh, try to eliminate, A, the need for the package because the package introduces a lot of electrical gitches and gomies, to eliminate the sensitivity to environment, to eliminate the need to worry about people's fingers getting in there.


We've been successful in creating those more ruggedized presentations for a semiconductor chip without the traditional package. Unfortunately, in doing so, we come up against... Well, to go back to your question, why do we keep pursuing this? Well, because by adding a package, we add not only cost, we add size, which is another detractor, and we add electrical parasitics, which diminish the performance of the final product. So, the more we can work on getting rid of that and minimizing it and bringing things into direct contact with the chip, the better.


Now, as we know, the electronics are continuing to get more and more complex. Some technology or fabrication techniques are good for one branch of the electronic circuit, they're not good for the others. Vis a vie, let's say analog parts do not like being processed using digital fabrication processes. So we've had to do some compromises. And the best way that we have found for decades, I mean the heterogeneous approach is not new. Matter of fact, the first business plan that I embarked upon in the late '70s was basically what they called hybrids at the time but it was essentially the heterogeneous approach that we call now.


We were stymied by the issues of not having substrates that were compatible with the chips. One issue that you are design audience will need to embark upon understanding is the issue of coefficient and thermal expansion. As we minimize the semiconductor package and the board product gets closer to the chip product, the more you have to worry about the fact that the chip has a very, very low coefficient of thermal expansion and certain boards that you use are very high coefficients of thermal expansion. When you marry those two together they don't like each other. So there are materials, there are methods, there are interconnect techniques available from different semiconductor companies that help address those issues.


In any event, the whole reason for the heterogeneous approach is to recognize that we have to have chips made in dissimilar fabrication processes. We have to have packages or chips minimized so as to come up with the optimum electrical performance and size performance that the product embodiment wants to have. So those are the main drivers.

Zach Peterson:
So you mentioned fabricated with dissimilar processes. And one thing I was just recently talking with Matt Kelly, who's a chief technologist from IPC, I was talking with him about this was what this looks like in terms of what goes onto an advanced package. And this is where we get into the chiplet area, I believe. And there's always, I think been this kind of dream within heterogeneous integration of being able to take dyes or chiplets from vendors A, B, and C, throw them together onto a substrate or onto an interposer, and then you have a package that you've essentially built up kind of in the same way we build circuit boards. With circuit boards, you go to Digi-Key or Mouser, whoever, check see what's in stock, you buy your components and then you're designing the board for that assembly process.


I think there's kind of that dream of doing the same kind of thing with heterogeneous integration. Would you say that's accurate or is that just kind of a pipe dream? Because the response that I got was not impossible, but requires a very mature marketplace.

Phil Marcoux:
Well, it's not impossible as long as whoever the individual is choosing the chip that's going to go in that product. And this is where in many cases the designer that's in your audience now has that responsibility. They need to recognize what compromises they're going to have to make in order to utilize that chiplet. For example, it's very, very difficult to do dynamic testing on chips in some of the advanced packaging formats. Even flip chips for example are problematic because if you probe them you potentially damage the walls. And you also find it difficult to get accurate dynamic or AC testing or in some cases doing thermal testing is an issue. We've always debated whether or not to do thermal testing in situ in the wafer form or simulated. Ideally we'd like to do it in wafer form, but then you get interactions between adjacent dye. So the designer just needs to realize that chiplets are not a pipe dream as long as they're willing to address and understand and accept the compromises that they may be presented.


Now, one of the bigger challenges that has always been in the summit conductor industry, and when I was in the summit conductor industry was always, oh, it was always I wouldn't say humorous, but always considered a paramount challenge to try to convince, oh, let's say, day's gone by National Semiconductor, Analog Devices, TI would make similar parts, but to get them to provide a chiplet in the current vernacular in the same format was really tough. For one reason, the whole economic dynamic of a semiconductor is if you find a semiconductor that's very, very popular, then the role of the product engineer in that company is to make it smaller to get more dye per wafer. Because you're limiting factor in fabricating semiconductor devices is the size of the wafer. The more dye you can get per wafer, the better your economics.


If for example, let's say TI has a more advanced process than say Analog Devices and they can make a certain part smaller, there goes your whole chiplet standard format. Unless those companies work together to agree to a standardized format, which has always been difficult to get them to agree to. Unless the designer is willing to accept as a compromise, again here's another compromise, single source. If you're willing to go sole source on the particular part, then you'd be very happy with their chiplet. If on the other hand you have to have multiple sources, then you introduce the problem of do you really have true multiple sources today, two years from now, three years from now, five years from now, that type of thing.


But there is traction because there's a lot of momentum and a lot of backing that we haven't had in prior years for the heterogeneous type of format. And then with the new funding coming from the federal government, that has included in it a great deal of incentive for the companies within the US that are going to benefit from that program to embrace the heterogeneous type of format and the chiplet format. So that's really good news and I think that alone gives me belief that we're going to see heterogeneous be the next major inflection point in electronic assembly. Whereas SMT was back in the late '80s, now I think we're on the doorstep of heterogeneous sometime in the next 10 years.

Zach Peterson: 
So given the central idea and heterogeneous integration being literally to integrate all of these different chiplets from different vendors, what do you see as the challenges for that? And then what has gotten us to this point? And what are the challenges for semiconductor companies to do this and why hasn't it really become a mature marketplace?

Phil Marcoux: 
Well, chiplets go to the very fundamental economics of making a chip. A wafer has a finite area. The more chips you can squeeze into that finite area, the better the economics of making that chip or selling that chip. Some companies have more advanced processes and can make chips smaller in size and some can't. A handful of companies may agree to a standardized format for a chiplet, and really all that means is that they've agreed to a standard format for the pinout or the PIN locations or pad locations on a family of chips. Company A may agree that with company B and company C tomorrow to standardize on the design format, but then couple years down the road when company A needs to make their chips more economical, they may decide that they're going to make them smaller and then that whole chiplet standard goes out the window. So that becomes a major challenge.


The challenge for the designer in that situation is do they accept the fact that they're going to be stuck with a sole source provided part, or do they want to somehow address the need for multiple sourced parts? I mean that really, again, is subject to or held up by the economics of the semiconductor industry, and there's no easy way around that. Now, what does help and what is going to help tremendously is this new federal funding that has embedded in it a great deal of support and incentive for the companies that accept the money to embrace the heterogeneous type of format. Many of the defense contractors, military products, advanced electronic products, all are now rapidly depending on the need for the heterogeneous. And so I'm delighted to see within that government funding incentives that we've not had before to promote the heterogeneous. So I think that's going to give us a big boost.


So where it took, oh SMT roughly eight, nine years to get accepted into the industry, the heterogeneous has been around a bit longer but I think with this new funding incentive, we're probably looking at it getting embraced certainly within the next 10 years. And so I really think designers have got to get on board now if they want to distinguish themselves and take advantage of the financial prizes, financial benefits that will come to them.

Zach Peterson: 
So I think it's interesting that you bring up defense as a consumer of this technology, because one of the recent trends in defense has been interoperability. And so I think if you get start to get concrete standards around chits and how they're constructed and how they interface with each other, then you can have this kind of interoperable system that you can pick pieces from and then put onto an advanced substrate. But then one of the other trends has been de-risking the supply chain and of course bringing it back on shore for the most critical products. And so I see this playing into that theme as well. But I'm wondering if the advanced packaging avenue for building ships is a big de-risk for other parts of the industry in terms of the supply chain. Would you agree with that as the ecosystem develops, that's possible?

Phil Marcoux: 
Oh yeah, absolutely. I mean, the other big driver will be medical products. I mean, you're going to see a plethora of medical devices, things we haven't even dreamed of being attached to our bodies that are monitoring functions and help us maintain our health, all of which want to be as minimally obtrusive to us as possible, and therefore they just have to be smaller size. But along with it, they have to be of higher reliability and non made of materials that don't interfere with us.


Defense has always been a traditional driver of new technologies. People, even though they're not necessarily a huge market financially, they've always been a great driving force in the early days of SMT for a while there. Well, there was a period of time in the early '80s when I was had a fledgling startup company. I mean, we were languishing, and part of it was due to the fact that we weren't addressing some of the issues that SMT presented to the defense industry. Once a group of us agreed to get together, and this was group called the Surface Mount Council, which was pretty much driven by the IPC and EIA and the Department of Defense. Once we got together and helped facilitate and addressing some of the issues why SMT finally took off. Now of course, we all recognize it as having taken off and products such as laptops and tablets and cameras and light, But in fact, it was really a lot of defense products that forced us to address some of the issues. In the background we're seeing some of that happening or that same thing, same dynamic happening with defense. But also I know from some of the work that I've been involved with that the medical products have been equally influential in forcing the need for heterogeneous products.

Zach Peterson: 
That's really interesting. I wouldn't have expected you to say medical. I know that medical products can have a really long life cycle, and I wonder if it is worth the investment to go the advanced packaging route for medical systems because they can't do things like forced obsolescence and then force people to re-buy now these kind of things that companies might do to try and increase their sales over time. So it was interesting that you brought up medical.


What are some other areas that I think people might think are a bit unexpected for advanced packaging to apply? Or is it really just going to be one of those things where it just slowly infiltrates its way everywhere?

Phil Marcoux:
Well, in telecommunications, I mean, the big driver there is going to be 5G. I mean, the speed at which the circuits have to work are greatly impeded by present packaging and present interconnect techniques. 5G is certainly a huge driver in forcing people to embrace minimal packaging and more higher density interconnection techniques.

Zach Peterson:
I think 5G would be something that people would certainly expect. And so are you thinking this is something more at the handset level or at the base station level or somewhere else? Or both?

Phil Marcoux:
Oh, it's across the board. I mean, again, the tolerance for the parasitics of capacitance between traces, the inductances, I mean, there's just almost no tolerance at all within 5G. Now, sort of tongue in cheek I would say that the server farms addressing the cryptocurrency would've been a big driver too. But given the demise of cryptocurrency, I'm not so sure at the moment.

Zach Peterson:
It'll come back I'm sure. There will be another bubble and people will focus on it for about six months, and then your neighbor's going to be investing in Dogecoin again and it'll crash. So I get cryptocurrency going through these peaks and troughs, peaks and troughs. But in terms of more advanced or I guess more established industries, I think it's interesting that we're able to pick out and identify these application areas where advanced packaging is really going to play a role in enabling more advanced systems. I think in some of these areas, you might not think that advanced packaging is going to play a role because I think traditionally they may not have been seen as these kind of super advanced areas. We talked about medical earlier, and with medical devices having such long life cycles, once they go and do product revision, I mean the old product's totally obsolete and they just can totally do a new design, whereas other designs are updated repeatedly. And so I think it would be less surprising to see advanced packaging in some of those more advanced areas. But it sounds like it's really going to slowly infiltrate everywhere and really force the designers to operate at multiple levels as time goes on.

Phil Marcoux:
Well, the take that I have is that part of the issue has been that the designers have been constrained. I mean, we really have not had that many different packaging options. So I mean, you had dips or through all devices way, way, way, way back when, you have surface mount devices now, you got some chip scale type products now. But I mean, the number of different options has not been that wide. Now we have much more options within the semiconductor processes themselves. We're actually introducing a number of options that people, designers may not be fully recognizing.


I mean, one example that was a big surprise to me with my last company ChipScale, our approach got it embraced within the image sensor market. So a lot of the cell phones that have images or camera modules in them have packaging that was developed in part by this company ChipScale. One of the things that particular advanced package format enabled, particularly as the number of pixels in an image sensor grew more and more the little wires, the wiring that was on top of the chip, got in the way of the pixels. And because of the format of the package, it was recognized by other companies that they could thin the chip so thin that, and specifically it's down below 25 microns, that the chip itself, the silicon becomes transparent to visible light. And so they could literally flip the package over, put the wiring on the backside of the chip and free up the pixels. So, now all of a sudden in the advanced packaging, by doing that flip, gave you higher resolution and opened up a whole new presentation format.


So I think just the fact that we've evolved to having more options for designers is what's enabling us to embark on these newer embodiments, address the ability to do things like 5G. People have worked on envisioned 5G products now for, oh, a couple decades, but having the wherewithal and technology to do it has just now come into being.

Zach Peterson:
So in terms of what designers can do to maybe either prepare themselves to move into this area, or if they feel confident that they have the skills to very quickly move into this area, what can they do, number one to, I guess, prepare themselves and make these designs fit into the traditional workflow they're familiar with? And then, what kinds of tools do they need to actually... Well, yes, and disclaimer I am also a member of PCEA I think it's a great organization. But aside from that, of course, getting those educational resources, what tools do designers need in terms of software in order to actually get in and start building this stuff? I mean, I could see, just from looking at PCB design software that conceivably you could configure it to do at least just the basic layout of what could be considered an advanced package. But I know it's not an advanced package, so what do designers really need?

Phil Marcoux:
Much of the software that's out there is very capable. PCB software is very capable of doing, let's say you wanted to do a heterogeneous in the format of just using a silicon substrate, which is basically where you replace the organic material with silicon. The design software that's out there fully functions and fully provides total capability of doing that type of substrate. There's no real difference. You change the dimensions, you change some of the parasitic guidelines, but everything is right there.

Zach Peterson:
So I think this is interesting because if you look in PCB design software, everything that you do is described in PCB terms I guess. And I think for designers who aren't familiar with what happens inside of a package substrate or in an interposer, it's hard to see the connection. But from what it sounds like you're saying is a lot of those same structures that we use in a printed circuit board, especially once you get into HDI, those are also used in advanced packages. Would you say that's correct?

Phil Marcoux:
Oh, absolutely correct. And then those areas where we do have nomenclature differences, there is groups that are actively working together to try and normalize and create a uniform nomenclature. Silicon substrates or probably better determined just playing silicon PCBs have become much more commonplace. And so it behooves those companies, one of which will be represented on my panel TSMC, it behooves them to work with the industry to come out with a common nomenclature.

Zach Peterson:
Well, it sounds like it's all part of developing standards around not just chiplets and chiplet interconnects, but advanced packages in totality. So that, as you're saying, designers can very easily jump in and there's a uniform vocabulary, there's a uniform set of expectations, there's a uniform process. Would you say that's correct?

Phil Marcoux:
Oh, yes, yes. But what we're lacking at the moment is sort of a centralized clearing house to try to help unify the facilitation of all of that. Now, it was a unfortunate circumstance that brought the group together in the early days of SMT to make that happen. We're trying not to relive that and address it earlier. So there are some groups being very, very good and proactive and working to create those standards and the nomenclature and try to get people on board, such as the design EDA companies and the assembly companies and the fabricators to work together.

Zach Peterson:
And so when you say the fabricators, it's not PCB fabricators, it is these advanced packaging fabricators who we hope to see more of, at least here in North America. Is that correct?

Phil Marcoux:
Yeah. Actually, there's quite a few here out in the US that have sort of lost some of their economic punch, but now with the prospect of doing things like silicon based PCBs suddenly they can start to look at a new lease on financial life. But they become silicon fabricators as opposed to organic board fabricators.

Zach Peterson:
So normally when you say something like silicon fabrication, I think people are thinking, oh, so you mean nanometer scale features on silicon? But really we're not talking nanometer scale features when we're looking at advanced packaging. I mean, what type of length scale are we talking about?

Phil Marcoux:
Oh yeah, in some cases we're just talking micron scale. Yeah, not that far field from where the densest weighted packages are today. If you think that the dense weighted package today is down around oh 16, 18 microns, a lot of the silicon substrates, they have a very useful life starting at around 10 microns and working their way down to a couple of microns.

Zach Peterson:
This is the type of thing that I guess you could say doesn't require the most advanced silicon fabrication equipment. So it sounds like the barrier to entry for companies who want to get into this, coupled with the additional funding to pursue this, really makes this something that could be brought up to speed rather quickly.

Phil Marcoux:
Oh, exactly. Exactly. And this is one of the areas that will start to get some publication in time. I mean, there's some very large mothball or formally mothballed summit conductor facilities back on the east coast of the US that are being resurrected now because the equipment they have, which in integrated circuit terms have gone past their life, but as far as a silicon substrate they're right in the prime of life.

Zach Peterson:
That's really interesting. And it actually kind of makes me question why has this not happened sooner? Why has it taken two years of supply chain problems and then new federal funding, at least in the US, and similar efforts in other parts of the world to move the industry in this direction?

Phil Marcoux:
Again, because of the compromises that the designers are going to be faced with when it comes to using the minimal chips. Remember, when you buy a package part it comes with a great deal of perk. One being a warranty, for example, which many of the chiplet manufacturers may not give you because their parts are exposed to all sorts of environments where if they're in a package aren't guaranteed for dynamic performance, some of the chiplet suppliers may not be wanting to do dynamic testing. They may come burned in, they may not come burned in. There's things that a package part gets as a routine part of the package, if you will, that a chiplet will not get, and therefore the design is going to be faced with compromises. That has been a severely limiting factor and may still for some products.

Zach Peterson:
So if those are the main challenges that create barriers to entry, I guess, for companies who want to get into this space or for further movement in the direction of heterogeneous integration and advanced packaging, whose responsibility is it to solve those problems? Does this fall on the individual designer and they have to do something? Is this an issue with standardization, kind of like we were talking about earlier, or is there something else? Whose job is it to make it easy to get over those hurdles?

Phil Marcoux:
Well, it's not easy, I mean, I'll be there to admit that. In the case of some of the designers they may realize that by them taking on the responsibility of helping make these decisions, it certainly is going to enhance their importance to their companies and therefore certainly help them move up the salary scale, which I think is certainly something that they ought to strive for and where the PCEA can be of help to them. In some cases, like the issues of burnin, those may be of such a broader challenge that the industry itself has got to come to an understanding. For many years, we've debated what is the true benefit of burnin? Is there true benefit of burnin? I think the industry itself can help provide research. In the early days of SMT, one of the big issues was, oh, depletion of metals due to scavenging of metal. Another one was the coefficient and the thermal expansion, which was not well understood. Those were not issues that could be addressed by an individual designer. Those had to be addressed by the industry as a whole, and they haven't. So again, it's a mix and match.

Zach Peterson:
Well, Phil, thank you so much for being here and as some of these challenges get worked out and as I think the industry works to standardize this, we'll definitely hope to have you back on to discuss some of these developments. And it's my hope that all of the engineers out there that are in the audience listening will take some time to learn about this important area of technology because I do agree that it is going to be more important going forward.

Phil Marcoux:
Oh, my pleasure.

Zach Peterson:
And to everyone that's out there listening in the audience, we have some great resources in the show notes I'd invite you to take a look at. And of course, if you're going to be in the Santa Clara area first week of October, make sure to stop by PCB West, you'll be able to attend Phil's panel on advanced packaging and heterogeneous integration. Last but not least, don't stop learning, stay on track and we'll see you next time.


 

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2000+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

Related Resources

Back to Home