PCB Manufacturer Trends and Challenges with Summit Interconnect

Kella Knack
|  Created: October 12, 2020  |  Updated: November 9, 2020
PCB manufacturing trends interview

PCB fabricators can be as diverse as the products they manufacture. You can find anything from a company based in Asia that focuses on volume production of complex multi-layer boards for the main players in the telecom and datacom market sectors. A manufacturer based primarily here in the States is something rare, especially one that offers a broad range of expertise, products, and services for a wide variety of end applications. While similar in several ways, there are also some unique aspects of both types of fabricators. This article is specifically about the second type, and I reached out to Summit Interconnect to speak with two of the company’s leaders—Clay Swain, Senior Vice President of Sales and Marketing, and Gerry Partida, Senior Field Applications Engineer. They describe the company’s products and services, which include the PCB manufacturing trends and challenges they see from their respective vantage points; what the face and nature of PCB manufacturing, and the effect that the COVID pandemic has had on their overall operations.


Clay Swain

Clay began his career in the PCB industry in 1989 in Logan, Utah as a sales manager at Lundahl Astro Circuits and remained there as the head of sales through the acquisition of ElectroEtch in Los Angeles in 1994 and the sale to Tyco Printed Circuit Group (TPCG) the following year. From 1995 through 1999, he held positions at TPCG as a National Sales Manager and General Manager for the Logan, Utah division. He joined TTM Technologies in 2000 as the VP of Sales and helped support the company’s IPO that year. Clay supported TTM’s sales, marketing, and investor relations functions through numerous acquisitions from 2000 through 2016. He joined Summit Interconnect in 2016, where he currently serves as the Senior Vice President of Sales & Marketing. He holds a BA and MBA from Utah State University.

Gerry Partida

As Senior Field Applications Engineer at Summit Interconnect, Gerry’s focus is on cutting-edge high density interconnect, high-speed digital, Flex/Rigid-Flex, and RF microwave PCB fabrication for the company’s military and commercial customers. He has been a certified IPC trainer as well as a member of the IPC-6012 and IPC-6018 review committees. Gerry explains, “I have been part of the IPC committees for the last 12-14 years. In my job, it’s important to have the marketing part, have a presence in the field, and be involved in the industry with the standardization bodies.”

Gerry began his career in the PCB industry at Everett Charles Test Equipment. From there, he went to Oprotech/Orbotech. He was a team member who introduced several critical advances to the industry, including CAM automation, netlist compare, and AOI CAD reference.

PCB Manufacturing Trends at Summit Interconnect

Summit Interconnect (referred to as Summit) was formed in 2016 following the acquisition of KCA Electronics and Marcel Electronics International (MEI). The goal was to create a well-capitalized custom circuit board company with advanced PCB manufacturing capabilities and industry experts to provide a dependable domestic PCB source for the aerospace, defense, and commercial markets. The company recently acquired Streamline Circuits in Santa Clara, California, to provide manufacturing and support in the heart of the high-tech centric Silicon Valley.

Summit is now one of the largest PCB companies in North America. The specifics and features of the company’s PCB manufacturing operations include:

  • Annual revenues in excess of $100-million.
  • Domestic manufacturing of advanced PCBs.
    • Offers total PCB manufacturing solutions through prototyping, quick-turn, and volume production.
    • Multiple sites have similar capabilities to provide redundancy and reduce customer risk.
  • Three California-based plants with locations in Anaheim, Orange, and Santa Clara with the following technology and service focus:
    • Anaheim—Rigid-flex, bookbinder, oversized flex, and rigid. Mid to high volume, standard lead time.
    • Orange—HDI, sequential lamination, RF/Microwave. High mix, low volume.
    • Santa Clara—HDI, sequential lamination, flex, and rigid-flex. Quick turn, new product introduction, pre-production volume.

The company has a total PCB manufacturing space of approximately 175,000 square feet with approximately 670 employees. In addition, it offers its customers cost-effective manufacturing solutions provided through its Summit Global program with partnerships in China, South Korea, Taiwan, and Vietnam.

As noted above, the company’s product offerings span rigid, flexible, RF/microwave, and semiconductor PCB products for the following market sectors.

Aerospace and Defense:

Commercial Avionics

  • Aircraft controls, communications, radar systems, entertainment systems


  • Avionics, munitions, missiles, radar systems, secure communications, simulation, and surveillance


  • Flight and non-flight, launch systems, communications/surveillance, payload
  • Commercial space equipment


  • Imaging, diagnostics, surgical equipment, patient monitoring, implantable devices


  • ATE, reference boards, probe cards, burn-in boards


  • Landline and wireless communications, servers.

Across all of the company’s operations units, approximately 65% of its business is dedicated to the aerospace and defense sectors. Regarding the breakdown of each of the company’s foregoing manufacturing operations, Clay notes, “Each facility has its own niche, and all are mission-focused. Our Anaheim facility is nearly all defense, and that’s where all of our big program work goes. Orange is the development location for the defense contractors, and it’s the place they go to do their quick turn and pre-production work. The Streamline facility is for our defense and commercial customers who need more of a prototype, leading-edge development factory. Streamline also does flex, so that provides us a way to do R&D work with rigid and flex products for our defense customers. In addition to each location having their specialty, there is some overlap between them, which provides our customers with the redundancy and risk-reduction capabilities they want and need.”

Engaging with Product Developers

As with other companies profiled in this article series, the earlier that product developers engage with Summit, the better the design to manufacturing coordination will be in terms of efficiency, manufacturing quality, yields, and overall costs.

Gerry explains, “There are all kinds of stages where product developers will engage with us. Some do it very early when they are doing the stackup and material selection. Ideally, we want to know the kind of drill spans they are using, whether or not they are using multiple sublams, where they are starting blind vias, buried vias and micro vias, and if those vias are stacked or staggered. If they ask early, that’s great because I can then guide them through the process and ask questions such as ‘why do you need all these structures?’ They assume they [the structures] make it easier. Then I will explain to them that they don’t, and they will end up with multiple lam cycles on the layers.”

PCB manufacturing trends

Gerry is well known in the industry as a good “go-to” guy. Over the years, at Speeding Edge, we have been able to call upon him to provide us with valuable manufacturing-related information that we have then been able to pass along to our clients. It is certain, on several occasions, that he has helped us save our clients from making bad choices/decisions.

Gerry continues, “I will look at a design and ask the customer the line and spacing that is intended for their PCB. Then, I will find out it is not compatible with the drill span or structures they have. Sometimes, they will have a blind via on a signal layer. This is harder to do on a signal layer than a plane layer. So, I will then ask them if they can go one layer shorter or further, such that they end up on a plane layer.”

“There are a number of things that can be done before fabrication that will make manufacturing better, result in higher yields, take less time, and reduce the number of lamination cycles. Then there are situations where a design will come in, and it is set and stuck because the design team has completely burned through the budget, in terms of both money and time, on the layout process. But they still want me to review the design and tell them everything that can be done to improve the design, reduce the number of process steps, and improve the yields. They will argue about the things that I find that are going to take extra time or diminish yields. This becomes a tough situation because you have to tell them ‘you have all these things that are going to cost extra time or diminish the yields.’”

Like us, Gerry has also encountered situations where customers are required to design a product in accordance with a particular IPC specification, but they then do things within their design that will cause the end product to be out of compliance with that specification. He notes, “They are trying to do a small feature with a plated layer and multiple sub-laminations to drill at the highest aspect ratio that is epoxy filled and still meet the class [requirement]. Then, when I look at the design, they want more copper in the hole than IPC allows and I explain to them that I can’t push epoxy in the holes and meet IPC’s requirement because the hole will be too small to achieve that requirement which is 50% in most cases. I have to tell them that they have to relax this or that element in order for the board to be manufacturable.”

“I recently reviewed a really complicated design. We went through the design with the customer, and they had fine lines and spacing for a differential pair, but the travel for the pair was only ½”. I asked them if they really needed that impedance because there is a big round pad that goes to other big round pads, and the impedance has never been stabilized for that line width. We suggested that we disregard any impedance requirements, make a wider space, and get better yields when there is no impedance happening in that layer. They agreed and changed the requirement and had more space and line width. In the end, we had simplified that design to achieve what they wanted, but it took months of back and forth.”

The Gotchas—Common Mistakes Occurring in Product Design

As noted in my other articles, when one customer experiences a problem in product design, there is a fairly high likelihood that others will as well. This is due to product developers using similar types of components for similar types of product designs, and as a result, they end up making the same mistakes.

From his perspective, Gerry says, “One problem I see, when using microvias, is stacking microvias greater than two. From what we have learned about reliability and doing reliability testing, you can’t get consistently good results when you do this. Now, most people are designing away from this.”

Gerry is a regular contributor to Altium’s resource blogs. He notes, “Recently, I wrote about developers removing non-functional pads in their designs and thinking that in so doing they have extra room to move the trace towards the drill. This is a common assumption. IPC 2221 actually tells you not to do this. It says ‘route with the pads in and when you are done, remove the non-functional pads.’ You have to route as if they are there.”

So, just how big is this mistake? Gerry explains, “My recent Altium blog post was about this topic. That post had over 14,000 views.”

As stated above, another current problem facing the industry revolves around developers wanting more copper in drilled holes than what IPC specifies. Gerry notes, “I think this problem comes from folks not understanding the annular ring requirements and how they are pushing the aspect ratios higher. They say, ‘I have this pad size, this drill and I want it epoxy filled.’ I explain to them that they are pushing the limits of the plating in the hole for the aspect ratio, pushing the limits of getting the epoxy to meet IPC, and pushing the limits of meeting the annular ring requirements. If just one of the annular rings fails, the whole panel is rejected.”

PCB manufacturing trends annular ring
Keep annular rings sufficiently large to ensure reliability.

I asked him if he runs into the same thing that others see in terms of people not understanding the difference between the outside diameter and the inside diameter of a drilled hole. He states, “All the time and then they also want a certain amount of annular ring. I have to explain to them that when there is copper plating, solder, and tin-lead plated reflow in the hole, we have to drill the hole six mils larger than the finished hole size. That extra six mils diameter means you have to add 3 mils to the annular ring in order for it to meet the IPC requirement. Many people don’t understand this, and it becomes difficult if someone calls out a via +/- 3 for a via size. That is the diameter that we are going to drill. It is not the finished hole size. I explain that if they give us enough annular ring on the component holes, then things are fine. It needs to be stated on the print that the hole size is +/- the drill size. This means that they understand that I can finish the hole at any size that works. This  hen allows me to use the drill size that gives me the best processing.”

Another issue that Gerry encounters is tangency. “Class 3 is 1 mil and Class 2 is breakout. Tangency is what is in the middle. It’s not even defined. I am going to explain tangency in a blog and what has to be done in designing the teardrop to accommodate it.”

Pushing the Envelope

The complexity, density, and performance of today’s PCB designs all push the envelope of what we can do with traditional design and PCB manufacturing processes.

Gerry cites, “It’s hard when we do multiple wrap cycles and have blind vias ending on the same layer. You keep having to build up wrap plate, and then you have to etch through it. This becomes a difficult process. More and more lamination cycles take so many process steps. You only have to be off by one, and then you lose everything. People ask us why yields are so low. For a 5-cycle lamination job, the yield is about 70%.”

He continues, “When there’s a single lamination cycle, there’s basically 25-30 primary process steps after lamination. When you do five, six, or seven lamination cycles, you’re up into the 300 or almost 400 process steps. If anything goes wrong, you lose everything, and you have to start over from the very beginning. The complexity is so far more than what it was 10 or 20 years ago. Many people have that as their experience base and wonder why fabrication is taking so long and why there are so many complexity and yield issues.”

I asked Gerry if it is fair to say that with each lamination cycle that the problems or challenges increase exponentially. He replies, “If you have a very tight annular ring, every time you take one sub and your try to bring that together with the second sub, you have got to have the two in line. They have their own play, and you have to worry about that. Or, you are looking at a series of materials and sub lam steps that you have never experienced before. We have prediction software that we use, but the prediction is only as good as the data that it has collected. When you are looking at something that you have never built before, you might spend six weeks figuring out the registration was never any good from the beginning. The software tells us this by code—green, yellow, and red. Green means it has a lot of data that backs up and matches the stackup; yellow is that it’s trending towards some number, but you could have or are building an outlier. Red is ‘just guessing.’ Ultimately, you should do a pilot.”

“All of these things have to be factored in. The question is: do we have the data that tells us with confidence we are going to be on target or not? In the end, you have to marry a series of blind vias to the outside world, and you have epoxy fills, laser drill, and final drill. Every one of those drills that comes to the outside layer is a different zero. You are hoping that they are all within a safe range of each other that when you put the outer layer image, one of them breaks out. One of the most complex ones I had was a 1:3, 1:5, 1:7, 1:11, and a 1:14 with a final epoxy at the end. The final epoxy was layers 1 to 14 all the way through the stackup.”

He continues, “What you have to do is get all the scales of that many different subs and hope that it all comes together at the end. We used our prediction software, which gave us the prediction, and it was actually right. No one was more shocked than our engineering team. We were looking at the scale it was predicting, and we thought, ‘those numbers look weird.’ We decided to trust the numbers, and they were right.”

Future Challenges

I then asked Gerry that if the previous is where we are now, where we will be in two to five years.

“The thing that continues to be challenging is routing density, the desire to have a smaller annular ring, a smaller pad to route wider conductors or more conductors in a more restricted routing space,” he explains. “The push in our industry is to always reduce that size and those footprints. For us, it’s about having material that doesn’t wick or propagate cracks or dielectrics in it when we assemble it. Some of these things we discover when we go into the OM tester and are looking at the geometries. A lot of the time, we are looking at the drill span.”

Note: The OM Thermal Stress System is a performance-based reliability test methodology that performs convection reflow assembly simulation per IPC-TM-650, 2.6.27 and air-to-air thermal shock per IPC-TM650

Gerry notes, “We have a cross-section for a microvia, a cross-section for the buried mechanical, a cross-section for epoxy fill, and a cross-section for the through-hole. The requirement for OM testing, which is deep coupon testing, is to test the entire structure such as a laser via to a buried mechanical to another laser via or a series of laser vias to a buried mechanical and then out the other side.”

He adds, “What we’re finding through the tester and by looking at the results is that the proximity to the buried mechanical to lasers can trigger failures. Nobody has evaluated this previously. We only evaluated the micro by itself or the buried mechanical by itself. We never put them in association, but that’s what happens in assembly. They’re designed together, and they’re assembled together. Having the OM tester and looking at the results for a number of years, we’re starting to say, ‘hey, this one works, but it has a greater distance. This one has some failures sometimes, and the proximity of one to the other is very close.’ We can build these structures all day long, and we can test them electrically, and they are good, but when the structures go through an assembly process multiple times, that structure may not be as resilient as we think it is.”

The preceding problem grows exponentially as the geometries get smaller, and the boards get denser. Gerry explains, “Part of the problem is that we discovered the foregoing years after the design was approved for flight. Based on the information we have gathered recently, our guidance now may conflict with a design that’s been completed. This is an example of where we tell our customers here’s a new design and a new DFM, and you don’t want this structure too close to this other structure. The customer wonders why we never told them this before, and we tell them we reviewed this design, and now we have a revision change.”

The Impact of COVID-19

As with many PCB manufacturing operations, the PCB fabrication industry has been impacted, to some extent, by the COVID-19 pandemic.

Clay notes, “It’s a challenging environment right now but we have been fortunate in that our factories have been able to continue to operate. But, we have had people who need to be home to take care of other people, who have had day-care issues or who are concerned due to underlying health issues. We have people in certain departments, such as engineering and customer service, who are working remotely. We’re adapting, but it’s challenging.”

He continues, “Supply of materials has become a little less dependable. Lead times are not being met as reliably as they were in the past. The reasons that we are getting range from freight issues to staffing problems. It’s especially noticeable if we have to bring in materials from Asia. If we order anything from certain suppliers, we are seeing significant surcharges because the cost of freight has really gone up.”

“The majority of our business is aerospace and defense, which continues to be busy. With our commercial business, it feels like a lot of those customers have not stayed open to the same degree that mil-aero has. I think there will be some pent-up demand when those customers start coming fully back online.”


The PCB product development process is one that can never be fragmented into individual segments. Instead, it’s an amalgam of design, fabrication, test and assembly operations that spans all of those segments and requires coordination, cooperation, and most importantly, active communication. Today's PCB manufacturing trends will continue to push designs into higher complexity for demanding technological applications, and designers need the best PCB layout tools to stay up to speed.

Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium or learn more here regarding manufacturability guidelines.

About Author

About Author

Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

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