The Right Termination, Of The Right Size, At The Right Place

January 8, 2020 Kella Knack

In recent articles, I have addressed reflections, what they do to signals on transmission lines and how to control them through the use of terminations, serial and parallel. One area of confusion that continues to come up in our on-site classes regards the actual placement of terminators. This article will address this topic and hopefully provide some useful guidelines. Note: I am only addressing series and parallel terminations. Most of the terminations being used (90%) are series. This is changing, however, because parallel buses are going away, and they account for the bulk of the use of series terminations.

In addition, determining the size (value) of terminators is an important consideration in the successful management of transmission lines, and it is also addressed in this article.

It’s All About The Placement

Series Terminator. Figure 1 depicts a series terminator. 

Series-Terminated Transmission Line
Figure 1. Series-Terminated Transmission Line

Lee Ritchey, Founder and President of Speeding Edge notes, “With both series and parallel terminations, the ‘rules-of-thumb’ tend to fall under the same category: Series terminators should be placed as close as possible to the driver and parallel terminators should be placed as close as possible to the receiver.”

“This kind of broad-based umbrella thinking is not practical or effective from the electronic point of view”, Ritchey continues. “With series terminators the theory is that they should be close enough to the driver so that the output impedance of the driver and terminator add up to make one resistor. The problem here is that there is a short piece of transmission line between the two that can’t be made to go away. And, if that piece of transmission line is long enough, they don’t add up. The effect is that you have two transmission lines with a resistor in between and this degrades the signal.”

In Figure 1, the short piece of transmission line is labeled as “L”. The challenge, from the design point of view, is in determining how long that short transmission line can be and still achieve the desired effect.  Ritchey explains, “There is no simple rule-of-thumb for determining how long the L transmission line can be because it depends on the rise time of the driver. The only way to get an answer that you can rely on is to use a simulator. You start with L being very small and observe the waveform at the receiver where the red arrow is located and slowly make L longer until the waveform at the receiver has been degraded to the point that it is no longer acceptable. It comes down to looking for a length where the waveform is still good enough. This becomes the allowed distance. “

“Determining the length of L is a 5 minute simulation at most,” Ritchey adds. “Most people have been guessing. When the rise times were not fast, that was ok. With edges getting below 100 picoseconds, this is no longer going to work.”

Parallel Terminator

Ritchey states, “With parallel terminators the goal is to be as liberal possible and make board layout as easy as possible. We don’t want to force the designer to crowd that resistor up against the receiver pin if it is not necessary.” Figure 2 is an example of a parallel-terminated transmission line. The parallel termination resistor is Zpt.

Parallel Terminated Line
Figure 2. Parallel Terminated Line

“In the case of the parallel terminator, we are delivering the voltage waveforms to the receiver. The job of parallel terminators is to take the energy out of the circuit so we don’t get reflections,” Ritchey explains. “Once the signal has reached the pin we have done the necessary job. So, putting that terminator at or after the receiver pin is acceptable. And, to facilitate placement and layout, the parallel terminator can be placed some distance from the pin.”

Ritchey continues, “In my classes I say ‘You can put the terminator a kilometer away if it makes it easier for you’ and people look at me like I am crazy. It’s hard to get people to think about fields and waves because they get so wrapped up in currents. When you understand that you have sent an electromagnetic field past that pin, which was the goal, it’s pretty straight forward.” “You don’t need a simulator for a parallel termination. It’s all about mechanics,” says Ritchey.” You want the terminator placed such that it is not so strict that it makes layout difficult. This holds true for series terminators as well. We want the L to be as long as possible so that placement does not become difficult.”

Determining the Size of Terminating Resistors

Once the proper location of a termination has been determined, the final task is to determine the correct size or value of the terminators.

As noted in previous articles with today’s low level logic signals, overshoot, which occurs when the reflection is positive and “adds to” the incident voltage level, does not degrade logic signal levels and is rarely a cause for concern. On the other hand, undershoot, in which the reflection is negative and “takes away” from the incident voltage level, degrades the logic level and is always harmful.

Next, it’s possible to look at real, frequently used component technology to see how the foregoing comes into play. As logic levels have been reduced below 3.3 volts, two things happen. First, the magnitude of the signal is low enough that the likelihood of an overshoot reflection causing an input voltage violation is reduced or cannot happen. The second is that the noise margin of all the inputs is reduced, making it more difficult to keep all the sources of noise small enough to maintain good signal integrity. For example, the noise margin of 3.3 volt HSTL (high speed transistor logic) CMOS is 1.15 volts, while the noise margin of 1.8 volt CMOS is only 430 millivolts. Currently, the industry is working with 1.2 volt and .9 volt margins, so the noise margin has gotten increasingly smaller. As a further example, with LVDS the entire signal swing is only 400 millivolts.

In order to minimize the chance of undershoot occurring and eroding the logic levels associated with the foregoing technologies, it is advisable to make choices to minimize it. There is one place in design rule creation that allows the design engineer to have an opportunity to influence the magnitude of the undershoot. This place is in the choice of terminator values. The normal variation in the impedance of PCB traces is + 10% around the nominal value. If the nominal value is 50 ohms, PCBs with trace impedances between 45 and 55 ohms would all be within specification.

In the case of parallel terminations, choosing a terminator resistor value of 55 ohms would result in no reflections when the PCBs are at the high side of the tolerance range and would result in an acceptable amount of overshoot for all other impedance values that are within specification. This is the reason that many applications call out a 110-ohm termination for a 100-ohm pair. It is the reason that most ECL termination resistors were 55 ohms when the system impedance was 50 ohms.

In order to minimize undershoot, the parallel terminator value should be 10% higher than the nominal impedance of the transmission line. For series-terminated transmission lines, the objective is to send a half-amplitude signal down the transmission line with the expectation that it will double at the receiver, making a full-size signal. This is illustrated in Figure 3.

Switching Waveforms for Series-Terminated Transmission Line

Figure 3. Switching Waveforms for Series-Terminated Transmission Line

Figure 4 illustrates the equivalent circuit of a series-terminated transmission line at T0 when the bench driver switches from a logic 0 to a logic 1. 


Figure 4. Equivalent Circuit for Series-Terminated Transmission Line at T0

As noted in previous articles, the voltage level at T0 at the input to the transmission line is often referred to as the bench voltage. This bench voltage doubles at the receiver to create the final logic level. In order to ensure that the logic level is not compromised by undershoot, it is necessary to choose the series terminating resistor value such that the voltage divider made up of Zout, the output impedance of the driver, plus Zst, the series terminator value and Z0, the transmission line of impedance is a 1:1 voltage divider, no matter what impedance the PCB has within its tolerance range.

To satisfy this condition, the sum of Zout, and Zst, must be less than or equal to Z0,-10%. In the case of a 50-ohm system, this value is 45 ohms. Some of the signal integrity tools with terminator wizards take this into account when recommending series terminator values.

Summary

Determining the terminator location and size (value) early on in the product development process is of paramount importance in preventing reflections. This is particularly important for preventing undershoot and guaranteeing a product that will work right the first time, as designed.

Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium or discover more about adopting signal integrity in your high speed design process with Altium Designer® 

References:

  1. Ritchey, Lee W. and Zasio, John J., “Right The First Time, A Practical Handbook on High-Speed PCB and System Design, Volume 1.”

About the Author

Kella Knack

Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

More Content by Kella Knack
Previous Article
Transmission Line Properties That Affect Impedance—Hidden Features
Transmission Line Properties That Affect Impedance—Hidden Features

Kella Knack provides a heavily detailed treatment of aspects of transmission line impedance previously addr...

Next Article
How the Fiber Weave Effect Influences High Frequency Signal Integrity
How the Fiber Weave Effect Influences High Frequency Signal Integrity

Here are some guidelines for modeling and preventing high frequency signal integrity problems due to the fi...