6-Layer PCB Stackup Design Guidelines

Zachariah Peterson
|  Created: May 4, 2022  |  Updated: November 26, 2023
6-Layer PCB Design

Once you’ve run out of room on your 4-layer PCB, it’s time to graduate to a 6-layer board. The additional layer can give you room for more signals, an additional plane pair, or a mix of conductors. How you use these extra layers is less important than how you arrange them in the PCB stackup, as well as how you route on a 6-layer PCB. If you’ve never used a 6-layer board before, or you’ve had EMI troubles with this stackup that are difficult to solve, keep reading to see some 6-layer PCB design guidelines and best practices.

Why Use 6 Layers?

Before starting a board, I think it’s important to consider the reasons one might want to use a 6-layer PCB. There are several reasons beyond simply adding more paths for signals. The most basic version of a 6-layer stackup will take the same approach as a SIG/PWR/GND/SIG stackup in a 4-layer board and just puts signal on two additional in the center of a stackup. In reality, a SIG/PWR/SIG/SIG/GND/SIG is the worst 6-layer PCB stackup from an EMC perspective, and it’s probably only appropriate for a board running at DC.

Some of the reasons I would opt for a 6-layer board over a 4-layer board include:

  1. You were using a 4-layer SIG+PWR/GND/GND/SIG+PWR stackup, and you need more room on the surface layer for components. Putting PWR and SIG in the inside layers gives more decoupling with a PWR/GND plane pair.
  2. For mixed signal boards, you can have an entire surface layer dedicated to the analog interfaces, and there will be an extra internal layer for slower digital routing.
  3. You’re using a high speed board that has high I/O count, and you want a good way to separate signals into different layers of the board. You can implement the same strategy as in #1.

In all these configurations, you’re only adding one additional signal layer, not two. The other layer is dedicated to a GND plane, power rails, or a full power plane. Your stackup will be the major determinant of EMC and signal integrity in your board, as well as your layout and routing strategy.

How to Route Signals

Before you start routing, let’s look at the typical PCB stackup you would use in a 6-layer PCB:

6 layer PCB stackup
6-layer PCB example.

In this stackup, the top and bottom layers are on thin dielectrics, so these layers should be used for impedance controlled signals. 10 mil is probably the thickest dielectric you should use because this will require microstrip routing with 15-20 mil width, depending on dielectric constant. If you’re routing a digital interface with differential pairs, the spacing will also allow a reduced trace width, which will allow you to route into finer pitch components. Just as an example, we have used a version of the above stackup for many of our small form factor networking products that support multiple multi-gigabit Ethernet channels.

If you need to use much smaller trace widths on the outer layers, just decrease the outer dielectric thicknesses (maybe as low as 4-5 mil), and then add some thickness to the L3-L4 dielectric so that you hit your board thickness target. The next point to consider is how to route power.

How to Route Power

In the above 6-layer PCB stackup example, there is an entire layer dedicated to PWR. This is generally a good practice in a 6-layer PCB as it frees up area on the surfaces for components, and it will be easier to get power to these components through vias.

Just as an example, take a look at the BGA shown below. This particular BGA is typical of a high speed interface controller that requires a lot of current at multiple voltages, so a lot of the balls will be connected to power and ground. In something like an FPGA, you might find multiple pins for power and ground throughout the footprint. Dedicating a single layer to power lets you break up the plane into rails so that multiple voltages can be used at high current if necessary. This way, you would not need to overlap these rails at different voltages, which prevents an additional EMI problem.

6-layer PCB design guidelines BGA
In this FPGA BGA footprint, you can see that multiple pins in the central region are dedicated to GND and multiple VCC rails. The GND pins can connect directly to the plane on Layer 2, and the VCC pins can connect to different power rails on Layer 3.

Note that, just because you placed power on an internal layer, that doesn’t mean you can’t put power elsewhere. You can still route power on your other signal layers as rails using copper pour, or as thick traces.

If you need high current operation in a 6-layer board, possibly at multiple voltages, I would recommend using an additional power layer instead of the additional signal layer. In other words, you’ll have two power layers interleaved with ground on the internal layers inside the stackup. You could even go a step further and put a power plane on the back layer for even more current handling capabilities. This would give you enough room to route power over a large area, possibly with heavier copper, to ensure low DC resistance and low power loss.

Aside from these points, the other important routing strategies used in a 4-layer or 8-layer board to ensure EMC will also apply in a 6-layer board. If you use something similar to the above example 6-layer stackup, you will have a much easier time of routing and ensuring signal and power integrity. The same DFM considerations in a 4-layer or 8-layer board will also apply in a 6-layer board; get your stackup approved by a fabrication house before you start creating your layout, sizing traces, and routing.

Make sure to follow these 6-layer PCB design guidelines before you create your stackup and start routing. When you’re ready to build your 6-layer circuit board, use the best set of PCB design tools in Altium Designer®. You’ll have a complete set of tools for layout, routing, and preparing your board for production. Once you’ve created your PCB footprints and you want to share them with your collaborators, your team can work together through the Altium 365™ platform. Everything you need to design and produce advanced electronics can be found in one software package.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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