Getting Through a PCB DFM Check

Jason J. Ellison
|  June 2, 2020
Getting Through PCB DFM

If you’re reading an Altium Blog, it’s probably safe to say that you’ve either designed or fabricated printed circuit boards. If you’re like me, sending a design to fab is a bittersweet experience. On the one hand, you’ll soon have your hands on the hardware you’ve been working hard to design. But on the other hand, you know the fabrication site is going to send a list of PCB DFM requests, and that’s never fun. In this article, we’ll discuss the key design features to implement, and steps to take prior to fabrication that will help prevent some common DFM problems. I’ll also provide examples of where I commonly see these PCB DFM problems in signal integrity circuits.

PCB DFM Starts With a Good Layer Stack

Many engineers pick a PCB stackup material based on the physical characteristics of the laminate, and they forget laminate is only available in specific thicknesses. Therefore, the stack-up needs to be designed from available options, not arbitrary thicknesses. Without designing with these finite thicknesses, you may need significant trace geometry changes once the fabrication site recommends a stack-up that can be realized. For example, if you design a stripline trace based on an arbitrary ground plane separation of 8 mils (two 4 mil dielectric layers), and the fabrication site tells you the material only comes in 5 mil increments, your traces may need to get significantly wider or closer together to maintain impedance. This becomes a particularly bad situation if the design is already pushing the limits on density.

To avoid this problem, contact the fabrication site before starting the layout, and tell them what you need the board to do. At minimum, tell them the intended frequency range which the PCB needs to support, the number of layers, and the overall thickness you are trying to achieve. Details such as the target DK for impedance control, the size of the panel, and the intended end use are very helpful for the fabrication site for narrowing down possible options. Choosing a material which the site is comfortable manufacturing also helps to ensure accurate results on the first run.

Meet IPC-A-610

IPC-A-610 is going to be your best friend for understanding what it takes to get your board through a PCB DFM check and fabrication without any issues. The document is relatively inexpensive, and if you don’t have access to a copy, I recommend getting it [1]. Within the standard, printed circuit boards are placed into three classes. Class 1 is for throw-away items for which failure rate isn’t very important. Class 2 is for electronics that need to work reliably and have a low failure rate due to the manufacturing process. Class 3 is for devices that cannot fail; a classic example is a pacemaker. The required specifications between classes are basically the level of safety margin built in to compensate for PCB-related failure modes, and for the related design criteria surrounding the physical limitations of the PCB fabrication process for a given site.

For most devices, you should be placing a fabrication note on your drill drawing layer which says “This PCB shall be fabricated according to IPC-A-610 Class 2.” This tells the board house to ensure all of your artwork will comply with this standard. But here’s a little secret about board houses: they check for IPC class 2 on all designs. They do this simply to ensure you don’t return your board for defects. So if they are going to be checking your PCB against IPC class 2 criteria, you should make sure the artwork meets the specification before it gets into their hands. It may sound simple, but it’s the most common problem I hear from engineers.

Meeting most IPC standards only requires some common sense. For example, don’t put silk screen over copper traces, or don’t put solder mask on SMT pads. However, there are a few that are easy to miss. These criteria are usually missed because the designer is focused on another aspect of the design, such as the signal or power integrity, instead of manufacturability.

Annular Ring Size

In the IPC document (specifically IPC 6012), drill breakout is described and quantified. This is done to ensure reliability, but it is still an important part of PCB DFM. To prevent breakout, the annular ring around a via needs to be 12 mils bigger in diameter than the drill at most fabrication sites. This issue tends to come up with artwork for coaxial connectors or high speed serial connectors. For signal integrity, this pad is only a nuisance and should always be minimized. Signal integrity engineers usually try to push this dimension to 8 mils, and that is possible. However, not all board houses can do it. 

. 20 mil drill (assuming 2.4mils of via plating) with a 32 mil annular ring.
Figure 1. 20 mil drill (assuming 2.4 mil via plating) with a 32 mil annular ring.

Drills in PCB Design and DFM

Trace-to-Drill Distance

The nominal distance from copper on any layer to an edge of a drill hole must be no fewer than 8 mils. This is to make sure the drill doesn’t walk or wander and come into contact with another net. Now, even though 8 mils is quite small, the current state of the art pushes circuit density and makes hitting this constraint a constant struggle. The key here is to plan ahead, create routing channels within your design, and design your traces accordingly. For example, say you have two rows of vias that are created by 10 mil drills and the rows are on a 40 mil center line. Your routing channel is then 30 mils minus 8 mils on each side for PCB DFM: 14 mils. If you need to fit two traces in there, you could use 5 mil traces that are 4 mils apart. In signal integrity applications, this comes up quite often when using backplane connectors. In AirMAXTM [2], for example, the connector has rows of vias created by 24 mil (0.6 mm) drills with an 80 mil (2 mm) centerline. That makes the width of the routing channel a maximum of 40 mil (80 - 24 - 8 - 8).This example is shown in the figure below. 

10/10/10 trace routed through a 2mm pitch via field.
Figure 2. 10/10/10 trace routed through a 2 mm pitch via field. 

Drill-to-Drill Distance

The absolute shortest distance between drills is complicated. The drill bit wobbles as it spins, creating its positional tolerance.This is known as drill wander. The drill bit also gets pushed around by the non-resin contents of the laminate (glass weave, fabric, or ceramic). The drill position is then altered as it continues through the board. This is known as drill walking. To conservatively estimate what distance to keep drills apart, use the following simple formula:

Minimum Hole-to-hole = Drill Diameter*2

The multiplier (2) actually comes from two other numbers related to the stack-up and material. This number can be lower, and if you need tighter via density, contact the fabrication site for their minimum hole-to-hole distance.

Minimum Drill Size

As stated above, drilling obviously has limitations. In addition to what was already stated, the minimum drill size is related to the thickness of the printed circuit board. This limitation is called aspect ratio. The aspect ratio is board house specific and should be on their public capability document. Typically, board houses can make the board 12 times thicker than the smallest drill hole. Depending on the fabrication site, this can be overcome by drilling from both sides. This idea effectively doubles the aspect ratio. The table below shows maximum PCB thicknesses for given minimum drill sizes for easy reference. 

Maximum Board Thickness for a Given Smallest Drill and Aspect Ratio.
Table 1. Maximum Board Thickness for a Given Smallest Drill and Aspect Ratio.

The aspect ratio also changes depending on whether your via needs a finished hole size, or if the finished hole size is “don’t care”. For example, 9.7 mil (0.25 mm) drills are very common for various grounding vias, and these holes don’t need to have a finished hole size. However, contemporary connectors for 56 Gbps and above have 17.7 mil (0.45 mm) drills that require the finished hole to fall into an acceptable range. Therefore, the 17.7 mil drill will probably follow the 12:1 aspect ratio, and the 9.7 mil drill will follow the 20:1 aspect ratio. That will limit the board to approximately 194 mils (5 mm).

Conclusion

To get your PCB through fabrication easily, design around the manufacturing process and implement the right PCB DFM rules in your design software. Start with the guidance above, and you’ll be far ahead of the competition. There will likely be other issues that are not covered in this blog, but take note of them and create more rules for yourself and your company for the next build when they come up. It will save you weeks in PCB DFM effort, and maybe even a few bucks on ibuprofen.

[1] Website where you can by IPC-A-610: https://shop.ipc.org/IPC-A610G-English-D
[2] AirMAX connector: https://www.amphenol-icc.com/airmax-10016527101lf.html

Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium or brush up further on design and manufacturability guidelines.

About Author

About Author

Jason J Ellison received his Masters of Science in Electrical Engineering from Penn State University in December 2017.
He is employed as a signal integrity engineer and develops high-speed interconnects, lab automation technology, and calibration technology. His interests are signal integrity, power integrity and embedded system design. He also writes technical publications for journals such as “The Signal Integrity Journal”.
Mr. Ellison is an active IEEE member and a DesignCon technical program committee member.

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