Non-functional pads are sometimes framed as an all-or-nothing debate, and the debates about reliability and effects on signal integrity abound. Should you keep them on your vias, or should you remove them from all vias? Like any design decision there are tradeoffs to balance, and typically one aspect of a design will take precedence over all others. Because there is no generalized rule about the use of non-functional pads, designers should determine if their layouts should include non-functional pads given their specific applications.
In this article, I'll examine the non-functional pad issue from three perspectives: signal integrity, reliability, and routing density. In some designs, these issues are exclusive of each other, so you will need to determine which of the design challenges listed below is most important for your product.
The presence of non-functional pads on plated through-hole vias can lead to a condition known as “telegraphing”. When there is so much copper at the vias, the material between pads becomes resin-starved. As a result, an image of the copper stack appears as peaks and valleys in the surface layers of the dielectric. In other words, the image of the copper stack is "telegraphed" to the board surface. The high spots create regions where epoxy can be "squeezed out," as described by one of our recent podcast guests. This leaves voids between neighboring pads at the right angle formed by the pad and via barrel, potentially leading to thermal failure at the joint.
Void formation leads to another reliability problem: electrochemical migration (ECM) failure. Void formation at via joints results in adhesion issues and allows ECM paths. This can cause growth of dendritic or fibrous structures between pads due to the slight voltage difference between them. Growth of these structures accumulates over time, eventually leading to PCB failure that is difficult to diagnose.
If dendritic structures can bridge the gap between adjacent conductors, a short circuit results. If the cross-sectional area of the dendrite is small, the current density will be high and the structure may burn out, essentially eliminating the fault. This leads to an intermittent failure behavior that is difficult to diagnose.
A good review on the topic of ECM in these materials can be found here:
I would argue these points are more important where the board will experience high temperature, frequent temperature cycling, and run at high voltage. All of these cases lead to greater potential for failure in these cases. Therefore, consider removing the non-functional pads if there is no other reason to keep them.
In many situations, non-functional pads are relatively harmless. Fabricators generally prefer that non-functional pads be removed because it makes drilling easier. However, keeping these pads will provide greater anchoring to the substrate during expansion and vibration, so it is thought it will increase the lifetime of those vias. These debates partially relate to the via aspect ratio.
In low aspect ratio vias, the interior copper plating is more uniform, and non-functional pads could increase the lifetime of the via. The combination of anchoring provided by the pad and the more uniform in the via barrel causes the via to be less prone to cracking. In high aspect ratio vias, the via barrel is more prone to cracking at the center due to the thinner copper coating in the center of the via barrel, regardless of the presence of non-functional pads.
Caution should be used when designing flex and rigid-flex PCBs. Copper in a plated through-hole via does not bond to a flexible substrate as well as strongly as it bonds to a rigid substrate. Because copper bonding is a reliability issue in flexible substrates, non-functional pads now become useful.
Some manufacturers recommend leaving at least some non-functional pads on flex and rigid-flex boards in order to provide anchoring for the Kapton Mylar flex material. If all non-functional pads are removed along a via in a flex PCB, the gap between functional pads becomes very large, and the plating may start to separate from the hole wall. All pads, both functional and non-functional, function as anchor points that are dispersed along the via barrel. This increases the strength of the via in a flex or rigid-flex PCB.
Non-functional pads take up valuable real estate on the inner layers in thinner multilayer HDI boards. As long as you can be sure the board will remain stable under thermal cycling, it may be desirable to remove non-functional pads in order to densify trace routing on inner layers. This is a challenge in more advanced designs where reliability concerns are not present.
The other area where it is useful to remove non-functional pads is in high-speed designs or RF designs, specifically on vias carrying faster signals or high-frequency signals. The other vias in these designs can be treated based on the other recommendations listed above.
The reason this is important in these more advanced designs is for signal integrity, and specifically for designing via transitions to a particular impedance. To hit an impedance target with a via transition, you need two elements:
The non-functional pads will create additional distributed capacitance along the wall of the via, and via structures are very sensitive to capacitive loading at high frequencies. The sensitivity is so great that the via impedance can switch from inductive to capacitive between WiFi and mmWave frequencies, as I've discussed in this related article. Therefore, I prefer to just remove the non-functional pads on these via transitions. This allows the antipads in internal layers to be set to the same diameter, which reduces the parameter space involved in optimizing these structures for very high frequencies.
The bottom line is: non-functional pads are not required in order for a PCB to be fabricated properly, but the PCB will not necessarily fail if you keep them either. Some guidelines state to always remove all non-functional pads. Personally, I prefer to keep the NFPs on a simpler design just for ease of layout and routing, but on more advanced designs with signals they should be removed. It boils down to two areas for me: IPC Class (or equivalent reliability standard for the product in question), or whether the via structure is on an RF/high-speed channel.
Through-holes in Class 2 vs. Class 3 - If I'm doing a Class 3 design and the hole is used for through-hole parts, I will leave a sufficiently large pad on functional layers that matches the top/bottom layers so that we can prevent breakout everywhere, and I will remove them everywhere else. The functional pad sizes will be a (Via/Pad) diameter of (D/D + 10 mils) for Class 3.
RF/High-Speed - For vias on high-speed channels that require controlled via impedance, I will remove the NFPs so that I can reliably set the via impedance to the desired value. I prefer to do this because it is easier to set the impedance in a via design tool like Simbeor or CST; removing the NFP removes on parameter from the design space. However, if reliability is the main concern, then the NFPs will stay on the padstack.
When you use Altium Designer®, you can easily customize the padstack in every layer in . You won't need an external program to create padstacks, everything happens inside the PCB editor. You can even place different NFP sizes on different layers, or you can remove NFPs on specific layers. This convenient tool helps you strike the balance between routing density, reliability, and high-speed via design.
Creating custom padstacks is simple inside Altium Designer. Learn more in the documentation.
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