Impedance Management Through PCB Stackup Design With Reference Planes

Impedance control, impedance management, and controlled dielectric are three terms that are loosely interchangeable and refer to different methods for setting the impedance seen by signals in a PCB. Impedance calculation tools, such as free online tools and your EDA programs, can help you calculate trace impedance and you can get a very nearly accurate value for impedance. However, the rubber meets the road during manufacturing, and the design you create will need to be produced such that it in fact hits its target impedance.

Obviously, no fabrication process is perfect, and any PCB that comes off the manufacturing line will have some variations in trace impedance, and the variations are more apparent at higher data rates (i.e., broader signal bandwidths). Also, if impedance is not specified corresponding to a real stackup or material dielectric data, the manufacturer will need to modify your design data to ensure the impedance target is hit.

Impedance Control vs. Controlled Dielectric

Designing boards that require a specific impedance specification, or multiple impedance specifications, generally involves two approaches: controlled dielectric design or controlled impedance design.

Some designers (including myself) will used the term controlled impedance to refer to the act of calculating trace impedance based on a specified layer stack. As long as the dielectric constant and thickness are known, then the trace impedance can be calculated. Some PCB manufacturers will refer to this as “controlled dielectric” design:

Controlled dielectric design requires that the designer know the dielectric constant for the laminates that support layers where an impedance specification is required. In other words, the designer needs to know the Dk value from a standard stackup or off-the-shelf material, as well as the layer thickness. The placement of reference planes (ground planes) does not need to be given in a standard stackup.

Some manufacturers provide impedance calculators that can help you determine the correct trace dimensions required for a given trace/ground plane arrangement and required impedance value. However, these calculators are basically enabling a controlled dielectric design as long as you input known Dk and thickness values for the dielectrics.

The other approach is controlled impedance. In this approach, the designer just selects the trace width/spacing they want and the impedance it will hit. The manufacturer then selects a mix of dielectrics and layer thicknesses to hit that target, and they will test this on a test coupon.

Modifying the layer stackup arrangement, dielectric thickness, prepreg thickness, and laminate thickness all change the impedance seen by signals on the board. As a designer, you just need to supply an impedance table or a transmission line table, as well as a stackup drawing, in your fabrication notes.

What fabricators generally will not do is start modifying trace widths and spacings in order to hit impedance targets. They may do things like apply teardrops and etch compensation as part of their engineering review, but this level of modification is best done in your native CAD files, not in the Gerber data. In general, you will not be sending the manufacturer your native PCB design files, so they will not go into the design and provide that level of modification to your traces for you. In the event they cannot hit your target with their material sets, they will send the board back to you for modifications.

How Many Unique Impedance Profiles Per Layer?

If you're a designer take the controlled dielectric approach, you might be tempted to calculate multiple impedance profiles for on a single layer. In general, it is preferable to only use unique impedance profiles on a single layer. For example, your 50/100 impedance profiles (Ethernet, HDMI, etc.) could be combined on the same layer, but you would not want to use these on a different layer that is dedicated to USB, DDR, etc., as these all have their own unique impedance profiles.

An example is shown below, where different unique impedance profiles are dedicated to different layers. While one profile could apply to more than one protocol, the separation used here is done by profile for a given layer. If you need your manufacturer to mix and match materials to hit your target, then you will need to specify the width/spacing values in the design and the impedance target you intend to hit.

• Learn more about specifying impedance control requirements

The reason for doing this is that it enables both the controlled impedance approach and the controlled dielectric approach. When taking the impedance controlled approach, this allows the manufacturer to only adjust the dielectric data for a single layer if needed, and this will only modify those target impedance profiles while maintaining all others. For example, in the top and bottom layers, the manufacturer can select the dielectric constant and thickness needed for a specific impedance target as long as you specify the trace width/spacing and target impedance value.

How I Prefer to Approach Controlled Impedance/Dielectric Design

After dealing with enough designs, I've found two approaches that generally work very well to approach an impedance (or rather dielectric) controlled design for a high-speed digital system or an RF system:

• Select specific off-the-shelf materials, use the dielectric information from the datasheet, and verify the manufacturer stocks the materials before proceeding.
• Obtain material information/datasheet, impedance values, and the associated stackup from your fabricator; this is generally specified in a standard stackup.

When I have control over these decisions in the design, I prefer to go the 1st route because I tend to work with a limited group of materials (Isola, ITEQ, and Rogers) that are stocked by my preferred PCB fabricators. I can then use a layer stackup creator (such as Simbeor and the Layer Stack Manager in Altium Designer) to calculate the required impedance profiles on each layer.

The 2nd route is chosen when any basic materials will work fine, but the design still needs an impedance spec. At that point, I just need to know a Dk value and the layer thicknesses that will appear in the stackup, and I can calculate widths and spacings to hit the impedance spec.

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