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    Methods For Calculating And Measuring Impedance, Part 1

    Kella Knack
    |  December 29, 2019

    In a previous article, I talked about the various transmission line properties that affect impedance. In this two-part article, I will address the methods used for calculating impedance. Included at the end of Part 1 is a list of 2D field solvers along with brief descriptions of their capabilities. Part 2 of this article will address other design aspects that influence impedance, including the frequency at which impedance should be measured, impedance vs. height above the plane, wave velocity vs. location, and the role of a TDR (time domain reflectometer) in measuring impedance.

    What’s My Line?

    To start, we will review the four basic types of transmission lines:

    • Symmetrical or balanced stripline.
    • Asymmetrical stripline.
    • Surface microstripline.
    • Buried microstripline.

    These foregoing types are depicted in Figure 1.

    Figure 1. Four Types of PCB Transmission lines

    Striplines refer to transmission lines that have two planes as partners. Microstriplines refer to transmission lines that have only one plane as a partner. Each type of stripline is discussed below.

    Of the foregoing, symmetrical striplines are the most ideal. However, when you build PCBs with symmetrical striplines, it is necessary to add a plane every time a signal layer is added. This results in a board that is extra thick and extra expensive.

    The shortcomings of symmetrical striplines go away with asymmetrical striplines which allow you to place two signal layers between each pair of planes. The quality of these transmission lines is more than good enough for any transmission lines that are encountered in logic designs. The only potential risks to signal integrity exists if a transmission line in one layer runs directly over the top of another transmission line in another layer. This creates excessive crosstalk and failures. Orthogonal routing that involves routing signals in one layer along the X direction and for the other along the Y direction solves this problem.

    Microstriplines can be placed either on the surface of the board or buried in the dielectric. As noted in previous articles, it is more difficult to control trace width and impedance on outer layers than on buried layers. As a result, buried microstriplines are the preferred choice for transmission lines.

    The Equations

    PCB stackups are created by using combinations of the aforementioned four types of transmission lines. The toolset that is used to create the stackup then uses Maxwell’s equations to precisely calculate parasitic inductance and parasitic capacitance. The preferred equation used for calculating impedance is repeated here in Equation 1.

    Equation 1. Z₀ = sqrt[ (R₀ + jwL₀) / (G₀ + jwC₀)
    Equation 1.The Impedance Equation

    In the above, Z0 is the impedance in ohms; jwL0 is the parasitic inductance in henrys per unit length, jwC0 is the parasitic capacitance in farads per unit length and R0 is skin effect loss (which can be ignored until you get to very high frequencies). G0 is the loss in the dielectric. As noted above previously, changing either the parasitic inductance or the parasitic capacitance will change the impedance of the transmission line.

    The advantage of equations is that they are free and relatively easy to use. Their disadvantage is that they only provide partial solutions. In all of the following equations, W is trace width, H is height above the nearest plane, T is the trace thickness and er is the relative dielectric constant of the laminate. Equation 2 is the most commonly used equation for surface microstrip transmission line impedance calculations.

    Equation 2. Z₀ = 79 ln(4.98H / 0.8W + T) / sqrt(e_r + 1.41)

    Equation 2. “The Surface Microstrip Impedance Equation”

    Equation 3, which was developed by Martin Marietta in the mid 1980s, is a method for predicting the impedance of buried microstrip transmission lines. In this equation there is no dimension to the surface of the PCB.

    Equation 3. Z₀ = 43.037 ln(H / W) + 5.048(T / W) + 106.76 / [ 1.09 sqrt(e_r)
    Equation 3. Buried Microstrip Impedance Equation

    It was discovered that when the transmission line is submerged in the dielectric by 5 mils or more, nearly all of the field lines are confined in the dielectric and there is no influence from the air. This will be depicted in Part 2 of this article by observing the velocity of the signal travel in a buried microstrip layer as compared to that of one on the surface or in a stripline layer. There are two ways to calculate the impedance of each layer in a stackup. They are:

    • Use traditional equations.
    • Use a 2D field solver.

    A 2D field solver is included as part of a number of today’s SI tools or as a stand-alone tool. It enables a user to describe a transmission line of any geometry with any combination of dielectric constants, height of the line above the power plane, trace width and trace thickness. The stand-alone tools are noted later in this article.

    Equation 4, was developed by Digital Equipment Corporation also in the mid-1980s and is a method for calculating the impedance of centered or asymmetrical stripline transmission lines.

    Equation 4. Z₀ = 80 [ 1 - B / (4B + 4C + 4T) ] / sqrt(e_r) * ln [ 1.9 (2B + T) / (0.8W + T) ]
    Equation 4. Stripline Impedance Equation

    As noted above, the foregoing equations are valid only over a limited range because of the assumption depicted in Figure 2. Here, the capacitance that makes up C0 is composed of two components.

    • The capacitance formed between the underside of the trace and plane, Cpp.
    • The capacitance formed by the fringing fields, C fringe.

    Figure 2. Parasitic Capacitance for a Surface Microstrip Transmission Line

    The assumption that is often made is that the ratio of the above-noted two components is constant. This is not true. When the trace is very narrow, Cpp gets very small while Cfringe remains constant. When the trace gets very wide, CPP gets large while Cfringe remains constant. What really happens is that, at both extremes, the accuracy of the equation becomes compromised.

    Field Solvers Vs. Equations

    Figure 3 is the plot of impedance versus trace width for the three most common types of transmission lines in PCBs—surface microstrip (SMS); buried microstrip (BMS) and centered stripline (CSL). All of the transmission lines are 1 ounce (1.4 mils) thick and are 5 mils above the nearest plane with a dielectric that has an er (dielectric constant) of 4. Trace width is the only variable.

    Figure 3. Comparing Equations to Field Solvers Predicting Impedance

    The three curves with the square markers are the impedances predicted by equations 2, 3 and 4. The three curves with the diamond markers are the impedances predicted by a 2D field solver. As can be seen for the CSL, the results for equation 3 and the 2D field solver are very close together. For the two microstrip lines, SMS and BMS, there is a significant difference between the equations and the 2D field solver. Which is correct?

    It has been documented in a number of papers that 2D field solvers predict impedance that agrees within the measurement accuracy of the test equipment used to measure impedance. It has also been shown that equations commonly predict the wrong impedance.

    Because of this equation error problem, those product developers using equations have often resorted to iterative, trial-and-error methods for adjusting the equations such that they will predict the “correct” impedance. In addition, some fabricators have gotten quite good at “fudging” the values of er used in their calculations in order to get good answers from the equations. The problem with this fudging approach is that it requires several trial and error attempts with new materials until they are “dialed in.” Even if there is time to dial-in a new material through manipulating the dielectric constant values to arrive at accurate impedance calculations, the PCB engineer is left not knowing the true er of the material. This factor is needed in order to accurately calculate velocity for the purpose of predicting the time of flight along traces.

    Even with a good impedance calculating tool, such as a 2D field solver, impedances can be calculated incorrectly. This happens because er, for a particular laminate, may be incorrect. The most common values for er are measured at 1 MHz. Figure 4 shows that the relative dielectric constant of common PCB materials decreases with frequency.

    Figure 4. Dielectric Constant vs. Frequency for Several Laminate Types

    It also shows that the relative dielectric constant varies with the ratio of glass to resin in the material. As a result, getting the impedance calculation correct requires three things:

    • Using a good 2D field solver.
    • Knowing the glass-to-resin ratio.
    • Knowing the frequency at which the transmission lines will be used.

    Once the foregoing factors have been taken into account, the results for impedance calculations are predictable and repeatable.

    2D field solvers are normally incorporated into the SI toolsets that are part of the PDB design systems supplied by the major EDA vendors. For those engineers who don’t have these toolsets, there are a number of companies that sell stand-alone 2D field solvers. These toolsets and their capabilities are as follows:

    • Hyperlynx Linsym
      • Does whole cross section at once; allows mixed materials and also handles differential pairs.
    • Polar Instruments Si9000b
      • Does whole cross section at once; allows mixed materials and also handles differential pairs.
    • Cadence Spectraquest
      • Does whole cross section at once and also handles differential pairs.
    • Z-ZERO BY Z zero
      • Does whole cross section at once.
    • Applied Simulation Technologies RLGC
    • ADS by Agilent
      • Also does 3D
    • HFSS by Ansoft
      • Also does 3D

    Once the material makeup of the PCB has been established, in terms of the glass-to-resin ratio and laminate type, any deviation from this during fabrication, such as using a similar but different laminate, may lead to incorrect impedances. As a result, the stackup on the fabrication drawing must list all of these parameters and note that they cannot be changed without first revisiting the impedance Calculations.

    Next: Part 2—Other factors that influence impedance calculations including frequency, height above the plane, wave velocity vs. location in the PCB, the frequency at which impedance should be measured, impedance vs. height above the nearest plan, and the role of TDRs in measuring impedance.

    Altium Designer’s controlled trace impedance calculator will configure your design rules with the correct trace width values for you. Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium.

    About Author

    About Author

    Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

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