Peripheral Startup and Reset Control in Embedded Systems

An MCU-controlled enable signal can create a startup problem even when the schematic connections are correct. The GPIO may reach the required logic level before the controlled component’s supply, reference voltage, or upstream circuitry is ready. Depending on the device’s startup requirements, that sequence can prevent initialization or produce an unintended state. Measurements taken afterward may show valid power and an asserted enable signal while missing the transition that caused the failure.

Mixed-signal processors provide a way to qualify the MCU’s command before passing it to the component’s enable input. Rather than sending an enable toggle directly to a peripheral, a mixed-signal processor can provide a supervisory role that determines whether the enable signal should be passed to an enable pin. While this can be done with discrete logic and an analog front-end, a mixed-signal processor can consolidate these components into a single package.

How to Supervise Enable Timing

Ensuring enable pins on peripherals are toggled in the right time window can involve several possible solutions, each requiring different levels of logic processing and are not always available in every host controller:

1. Delay the enable toggle signal with a buffer by a fixed time interval
2. Delay the enable toggle signal with a buffer by a fixed number of clock cycles
3. Monitor the required power rails to ensure settling, then pass the enable toggle signal
4. Monitor some other signal to ensure appropriate amplitude or setting, then pass the enable toggle signal

The controlled peripheral’s datasheet typically establishes the relationship between power and enable/reset timing. However, the other factors which could impact timing (other signals, settling power, etc.) are often unpredictable as they require monitoring another circuit, so it is not possible to generalize how to time enable signals.

Fixed Delays

In most cases, option 1 will be applied when power monitoring is required, and a very long delay can be applied to guarantee power settling. Option 2 can sometimes be infeasible because it requires the MCU to provide a pulse train timed to the internal clock and it consumes an additional GPIO pin.

A fixed delay is best used when the relevant startup time has an upper bound and there is little or no deviation from this value. Its reference event matters: a delay from regulator activation covers a different interval than a delay from a voltage threshold crossing. When startup duration varies, such as from unpredictable transients during startup, a supervisor solution where power or signal is actively monitored gives better reliability for each enable-pin toggle event.

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Supervisors

Options 3 and 4 essentially involve the same solution: monitor either power or some other signal (or both) and determine the appropriate time to toggle an enable pin using digital logic.

A supervisor approach is appropriate when readiness depends on conditions that vary between startups, including supply ramps, reference settling, or upstream circuit activity. Voltage sensing and/or signal inputs allow enable-timing to follow any logical conditions. For example, both a power rail and another control signal (digital or analog) can be used as the conditions to toggle an enable pin. This example highlights a case where multiple prerequisites must be satisfied together before a peripheral is powered ON.

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Simple Supervisor Solutions for Enable Pins

A simple supervisor converts measured readiness into a logic condition that qualifies the MCU command. For power monitoring, a comparator senses a divided supply voltage against a reference, or a supervisor IC supplies a power-good indication. The threshold includes allowance for sensing errors and the peripheral’s minimum supply requirement. The MCU request and readiness indication then feed logic that controls the enable output. Output polarity and voltage compatibility determine how the logic drives the peripheral.

Signal supervision follows the same structure. An analog comparator can detect a reference or bias voltage reaching an acceptable level, while two comparators can establish a voltage window. Digital status signals can indicate that upstream circuitry has completed initialization. Combining these conditions allows power and signal readiness to qualify the same enable request, provided each prerequisite can become valid while the peripheral is disabled.

Several circuit features determine how consistently the supervisor responds:

• Comparator hysteresis limits repeated transitions near a threshold.
• A qualification delay rejects readiness indications that are too brief.
• Defined startup and fault states determine enable behavior during resets or loss of readiness.

The settling interval begins when the MCU request and all monitored prerequisites are valid. Loss of readiness clears qualification so a complete new interval is required before activation. This behavior avoids counting time spent below a voltage threshold as settling time. An upstream power-good signal may still require an additional delay if its assertion precedes the peripheral’s required settling point.

A small mixed-signal processor can consolidate the comparators, timing blocks, and logic used in these supervisor circuits. Devices with suitable resources can monitor analog signals, digital status signals, and power rails within the same package. Available comparator, timer, and output resources determine channel capacity. Multiple supervisor interfaces can share that package while maintaining separate qualification conditions and independently toggling multiple enable pins, reducing the discrete circuitry required around the MCU.

Use GreenPAK to Design and Verify Enable Timing

GreenPAK can consolidate the sensing, logic, and timing circuits that qualify MCU commands before they reach peripheral enable pins. Supply monitoring, analog threshold detection, and digital readiness inputs can share one device. Multiple enable outputs can have separate qualification conditions, allowing each peripheral to start when its own prerequisites are satisfied.

On-chip comparators detect analog conditions, while configurable LUTs, flip-flops, and counters determine when to assert a reset, enable a circuit, or wake the host. These hardware functions can operate without a separate firmware control loop, allowing the processor to remain asleep until a qualified event requires its attention.

The Go Configure development suite allow engineers to configure comparator thresholds, qualification logic, delays, and output behavior. Simulation and development hardware support evaluation of the resulting sequence, including early requests and interrupted settling. Device selection depends on the analog resources, timing blocks, and pins required for each independently controlled enable output.

To learn more, take a look at the GreenPAK components and reference examples.

• Learn more about GreenPAK components
• View GreenPAK supervisor examples

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