Routing Topologies in Your PCB for Power, Data, and Peripherals

Zachariah Peterson
|  Created: May 5, 2019  |  Updated: April 9, 2021
Routing topology configuration in PCB design

When I was young, I remember opening up old computers and looking at how all the electronics were linked together. This is back in the days of the old SCSI hard drives, where drives were daisy chained together with those old multi-connector ribbon cables. Computers have come a long way since the SCSI daisy chain, and more advanced digital interfaces on PCBs and between boards in a larger system have borrowed from the standard networking topologies. While the form factor may have changed over the years, the structure of electrical connections between components and subsystems in electronic products has not changed at all.

If you're a new designer who is just getting started with an advanced interface like DDR, or you're routing your first bus protocol, it's important to understand some basics about PCB routing topologies. There's also the matter of designing power distribution, which can have its own routing protocol for power buses, connections between boards, and ensuring consistent ground in your system. 

Common Routing Topologies in Your PCB

Several common routing topologies are used throughout PCBs for routing power, digital data, and even some specialty analog systems. Some advanced topologies are used for computer peripherals like memories. The common routing topologies in PCBs have the same names as their networking topology analogues, so familiarity in these areas helps. Unlike networking, the goal in implementing a routing topology configuration in PCB design is not limited to data transmission between components. Power is also "routed" around a system in a definite topology, and different topologies maybe selected for various reasons.

The image below summarizes the common networking topologies, some of which might be used in various areas of PCB design.

PCB routing topologies
Some of these standard topologies might be used in your PCB as layout and routing topologies.

Each of the boxes in this image could be a single component on a board, a circuit block on a board that contains multiple components, or a single board in a multi-board system. As we zoom out to higher levels of abstraction, we start to see how these topologies start to resemble standard networking topologies. At the granular level, where we're looking at individual components, only some of these topologies are practical at the board level. The table below summarizes how these various topologies are implemented on the PCB, or at the system level between multiple boards.


Application Area


- Digital protocols like I2C, implemented at the board level

- Power distribution

Point-to-point (linear)

- Some high-speed routing topologies, some of which resemble bus routing, implemented at board level


- Not typically used with copper media at board level or system level

- Can be easily implemented wirelessly (e.g., with Bluetooth)


- Component layout topology that is interface-agnostic

- Host controller interfacing with peripherals (e.g., CPU and peripherals)

- Can also be used for power distribution at board or system level


- Not typically used with copper media at board level

- Inflexible at system level


- Could be implemented at board level when multiple processors are present (e.g., master CPU controlling MCUs, etc)

- Also be used for power distribution with multiple voltages/currents

- Typical at the system level

Some commentary is useful here as it shows where each topology might be useful and how they are practically used for different portions of a system.

Star routing can be used to provide multiple ground connections to a single point for power distribution. The star topology is also used with a system clock in a high-speed PCB, as is evident in the image of the BGA below. The signal originates from a single point and is routed to different components on the board as needed. Note that the terms “source single point” and “star” are two different names for the same topology. The difference with a star topology is that this source point is placed at the center of the downstream components.

Tree routing (or multi-point) applies to same idea to multiple "stars" in a hierarchy, where multiple power rails are broken out from a single point and sent to different circuit blocks or devices. Another variation is source multipoint topology, where a single power rail is used as a bus and supplies power to downstream circuit blocks.

A mix of routing topologies in a single PCB with a BGA

Some variations on the topologies in the above table are used for more advanced digital protocols. Two important examples are DDR2 and higher, as well as PCIe.

Routing Topologies for Memories and Computer Peripherals

When it comes to memory modules and their interface with a processor, combinations of more complex topologies connect devices within a board. The simple point-to-point topology is also used for advanced protocols like PCIe. Let's look at these examples as they illustrate how standard routing topologies are adapted to advanced signaling standards.


The T-topology is used in DDR2 and less-advanced versions of DDR3. This is a combination of a tree and point-to-point network routing topology. The command, clock, and address traces are routed in a tree-type network, while data lines are routed in a point-to-point manner directly with a processor. While this topology was useful for taking advantage of greater data rates, the number of usable memory modules and data transfer rates were limited by capacitive loading.

Fly-by Topology

Newer DDR memory modules use fly-by topology. The primary topology used in DD3 and DDR4 represents a combination between a point-to-point network and a bus network. Power/ground, command, clock, and address signals are routed on a bus to each DRAM/SDRAM, and these are then routed to a processor using differential pairs. This is a significant upgrade compared to DDR2 and earlier memories. Compared to T-topology, fly-by topology supports operation at higher data rates while reducing timing skew between heavily loaded signals travelling from the processor to memory modules.

DDR Routing topology

Newer memory architectures, such as NAND flash memory with 3D Xpoint from Intel, have an internal crossbar-type topology inside the package. Still, manufacturers will recommend a point-to-point topology for actual layout on a PCB. However, star and T-topologies can also be used with NAND flash packages. Using a point-to-point topology with NAND flash packages is simple enough that a low-cost four-layer stackup can be used. In this case, ground and power are placed on the internal layers, and signals are routed on the surface layers.

Point-to-Point Routing for PCIe

PCIe is a bidirectional serial protocol that uses a point-to-point routing topology between peripherals, where components are cascaded along an interconnect. In some ways, PCIe appears as a parallel bus architecture, but this is not really the case as different lanes in PCIe bus are not broken out to different devices. PCIe lanes use impedance controlled differential pair routing with separate Tx and Rx lanes.

The lengths of pairs in PCIe's point-to-point topology don't need to be the same. In other words, the length of the RX pair can be different from the TX pair, and vice versa, as long as the traces that make up a pair are length matched. To learn more about the important technical points for PCIe interconnect design, take a look at the following resources:

Technology is continuously advancing, especially in computer peripherals and memory devices. This means engineers and systems designers need ever more powerful tools to keep up with the pace of new developments. Altium Designer® integrates layout and routing features into a single program alongside verification, simulation, and production preparation tools. You’ll have the advanced tools you need to implement routing topologies for any application.

When you’ve finished your design, and you want to release files to your manufacturer, the Altium 365 platform makes it easy to collaborate and share your projects. We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.

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