What Is Solder Mask Expansion and Which Value Should You Use?

Zachariah Peterson
|  Created: March 10, 2022  |  Updated: July 14, 2024
PCB Solder mask expansion

The solder stop mask layer caps off the PCB and provides a protective film over copper on the surface layers. Solder mask needs to be pulled back from landing pads on the surface layer so that you have a surface where components can be mounted and soldered. This removal of the solder mask from a pad on the top layer should extend some distance around the edge of the pad, creating either NSMD or SMD pads for your components.

How far back should you pull the solder stop mask expansion so that you can prevent an assembly defect and ensure there is plenty of area for soldering? As it turns out, with steadily smaller components and higher density layouts being the norm, solder mask expansion can create small solder mask slivers that will be leftover on the surface layer. At some point, the minimum allowable solder mask sliver and the required solder mask expansion become competitive design rules; you might not be able to satisfy both rules simultaneously.

What Is Solder Mask Expansion?

Solder mask expansion is the deliberate increase of the solder mask opening around a PCB pad to ensure the entire pad is exposed for soldering, compensating for potential misalignment during manufacturing. This technique is essential for creating non-solder mask defined (NSMD) pads, which offer better solder joint reliability. A typical recommendation is a minimum solder mask expansion of 3 mils on all sides to account for up to 2 mils of misregistration. Proper solder mask expansion prevents assembly defects by ensuring sufficient soldering surface and maintaining the necessary solder dam width between adjacent pads.

Balancing Solder Mask Expansion and Slivers

Perimeter Pad Size vs. Misregistration Tolerance

This is the primary reason to apply a positive solder stop mask expansion, which creates a non-solder mask defined (NSMD) pad. The justification for this has to do with the copper etching process; copper etching being a wet chemical process, actually has higher precision than solder mask application. Thus to ensure the entire pad area is always exposed, we apply a sufficiently large solder mask expansion around the pad.

The lower precision of the solder resist application process can create misregistration, where the solder stop mask does not perfectly match the location where it is defined in your PCB layout. However, if the solder mask expansion is large enough, it will compensate for the misregistration and the pad can still be fully visible through the solder mask. The smallest recommendation on solder mask expansion recommendation I’ve seen is 3 mils on all sides of the pad, which will compensate for misregistration of approximately 2 mils.

PCB solder mask expansion

This pad has a small amount of solder stop mask misregistration

What if your pads are already sufficiently large? In that case, you could justify going with a smaller solder mask expansion value. In this case, if you use a smaller expansion with larger pads, you’re still assured to have sufficiently large exposed pad area even if there is some misregistration. In any case, you also have to consider the need for solder dams between nearby pads/vias.

Minimum Solder Dam Size vs. Minimum Solder Mask Sliver Size

The minimum solder resist sliver size will limit the solder stop mask expansion opening you can apply for a given lead pitch. If the lead pitch is large enough, then you can always apply a large solder mask expansion without worrying about hitting a solder dam limit. When the lead pitch gets small, or when components get packed close together, you might violate the minimum sliver size. In that case, you need to decide whether you favor compensating for misregistration or ensuring there is always some solder dam. On fine-pitch components, I prefer the latter.

Solder dam

These locations will violate mode fabricator limitations on minimum solder dam size. Assembly defects could be prevented by applying some extra spacing between the pads for different components

Because the solder stop mask web needs to be at least approximately 3 mils to stick to the surface of a PCB substrate, you can generally fit minimal solder mask expansion around a pad when the pad pitch is 20 mils or higher. If you’re looking at internal leads (such as inner balls on a BGA footprint), it’s appropriate to use SMD pads and place small dams between pads and vias.

Should You Let Your Fabrication House Decide?

If you just set a blanket design rule and apply 0 mil or 1 mil expansion so that you can hit your density requirement, your fabricator might apply an additional expansion value. If they do this, they might not tell you about it; you should expect that a fab house might apply this to overcome misregistration between the solder stop mask stencil and the pads on the surface layer.

My preference has been to set the mask to 0 mil on most projects for two reasons:

  1. Unless I’m dealing with a very high density layout, the footprints we’re using for most components will have large enough pads that the typical amount of misregistration won’t significantly reduce the soldering area on the pad.

  2. I already know the fabricator will increase the solder mask expansion because I work with a limited number of fabrication houses; I know their process and I’ll get a chance to check exactly what they want to modify when they send me their DFM report.

Point #2 should illustrate the reason you should have a preferred set of fabrication/assembly companies you use, and you should understand their process. My company has several manufacturing partners that we use exclusively for low and mid-volume client projects. We know what they expect and the feedback we might receive after an initial DFM/DFA review.

If you want to really communicate your intentions to your fabricator, make your intentions clear in your fabrication drawing. Add a note to your fabrication drawing that states the fabricator has permission to modify solder resist openings within a certain range (maybe +/- 3 mils). The other option is to put a specified tolerance on your solder mask expansion, and then specify a minimum sliver width. Just note that they might send the board back to you if your tolerance is too tight, at which point you might need to relax your tolerance requirement.

Solder mask expansion fabrication note

Note 10 in these fabrication notes specify what level of solder mask expansion I’m willing to tolerate in this design. In this case, I’ve specified that I prefer solder mask openings to match the pad size

Once you’ve determined the minimum solder mask expansion and sliver you need to prevent assembly problems, you can use the CAD tools in Altium Designer® to define your land patterns and footprints. You and your team will be able to stay productive and collaborate efficiently on advanced electronics designs through the Altium 365™ platform. Everything you need to design and produce advanced electronics can be found in one software package.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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