In part 1 of this article, I described what transmission line reflections are, how they are created and what the resulting waveforms look like. This part of the article will discuss what reflections do to a signal.
Figure 1 is a typical 5V CMOS driver driving a 50-ohm transmission line that is 12 inches or approximately 2 nanoseconds long. There is a CMOS receiver at the end of the line that is a tiny parasitic capacitor. For these purposes, it looks like an open circuit.
Figure 1. A 5V CMOS Circuit Driving a 50-ohm Transmission Line
When the logic level in the circuit in Figure 1 switches from a 0 to a 1, it results in the waveforms shown in Figure 2.
Figure 2. Switching Waveforms for Circuit in Figure 1
As can be seen, there are two waveforms separated in time by the electrical length of the transmission line. The first waveform in time is the one at the driver output (red). The second waveform in time is the one at the input to the load or receiver(yellow). It’s readily apparent that the two voltage waveforms are quite different. This commonly occurs in most transmission lines. The voltage waveform of interest, and the one that must be engineered to meet the input conditions of the load, is the waveform at the “load” end of the line. When the conditions are right to create a good “input” waveform, the voltage waveform at the driver will appear to look bad. It’s important to keep in mind that the voltage waveform is a manifestation of the magnitude of the electric field portion of the EM field.
What Happens When the Logic Level of a 5V CMOS Circuit Switches from a 0 to a 1?
The following is a walk through of the events that occur when the logic level of a 5V CMOS circuit switches from a 0 to a 1. It should be noted that these same events willoccur with any logic family. Understanding how the driver interacts with the transmission line and the loads along the way is an imperative in successfully designing and managing a transmission line.
At time To, the logic circuit internally changes state from a 0 to a 1. At that moment, the equivalent circuit appears as shown in Figure 3.
Figure 3. Equivalent Circuit of Driver and Transmission Line at T0
As can be seen, the combination of the output impedance of the driver and the line impedance creates a voltage divider. This divider causes the voltage level at the input to the transmission line to be less than the expected 5V CMOS logic 1. This level, which is in this instance 3.3V, is the actual signal level that starts down the transmission line. It is created by the voltage divider that is a combination of the 25- ohm output impedance of the driver and the 50-ohm impedance of the transmission line and yields 2/3 of 5 volts. The voltage level is a measure of the size of the EM field that is propagating down the line and it is referred to as the “bench voltage.” It should also be noted that the load at the end of the transmission line is not visible to the driver. They are separated by 2 nanoseconds of time. Stated another way, drivers can’t see what the loads are at the other end of the transmission line. All they can see is the input to the transmission line.
The EM field, which has a voltage amplitude of 3.3V, travels down the transmission line and appears at the other end 2 nanoseconds later is represented as T2. The “load” is a tiny parasitic capacitor from the input to the logic circuit. This parasitic capacitor absorbs only a very small fraction of the energy in the EM field. For all practical purposes, the transmission line is an open circuit. Because of this, all of the energy in the EM field is reflected back toward the source. The polarity of this reflection is positive and, as noted in Part 1 of this article, adds to the incident voltage and results in a “doubling.” At this moment, the amplitude of the voltage at the load is 2 times the bench voltage or 6.6V.
Now, the energy in the EM field is traveling back to the source. Two nanoseconds later, at T3,it arrives back at the source and sees the equivalent circuit shown in Figure 4.
Figure 4. Equivalent Circuit of Transmission Line as Reflected Signal Arrives Back at the Source
If there is no series termination, which is expressed as Zst,,the impedance that is attached to the end of the transmission line is Zout, of the driver or 25 ohms. The voltage source acts as a short circuit and causes two things to happen. First, the arriving signal is divided down by the ratio of the two impedances. Second, the remaining energy in the EM field is inverted by this high to low impedance change and reflected back down the transmission line toward the load end. Two nanoseconds later, at T4, it arrives at the load end and appears inverted. As noted before, because there is no load at this end of the transmission line, all of the energy arriving in the EM field is reflected back toward the source, doubling as it does so.
In theory, this process repeats itself forever. In reality, the signal becomes successively smaller on each round trip and finally dies out. This decrease in amplitude occurs because some of the energy is absorbed in the 25-ohm impedance of the driver each time the EM field arrives back at the source. This diminishing waveform is often mistakenly referred to as “ringing” because it appears to be a dampened sine wave. Instead, this represents a series of transmission line reflections. In contrast, ringing occurs when a parallel resonant circuit, comprised of an inductor and a capacitor, is excited by an impulse of energy much like the striking of a bell.
Once it is understood that the behavior of a transmission line is driven by a logic state change, it is possible to perform some diagnostics by “reading” the waveforms that can be measured at the source and the load. For example, knowing that the line impedance is 50 ohms and the beginning voltage is 5 volts and the bench voltage is 3.3V, it is possible to calculate the output impedance of the driver. Knowing the output impedance of the source, the beginning voltage and the bench voltage, it is possible to calculate the line impedance. This latter calculation is the one that is used to measure line impedance with all of the standard impedance measuring tools such as a TDR (time domain reflectometer).
Understanding the phenomena of transmission line reflections and how they occur, it is possible to determine their impact on signals and avoid their occurrence in any well thought out, carefully calculated transmission line design.
PCB design and analysis tools in Altium Designer® can help you analyze the various aspects of your transmission line, including termination impedance matching to reduce reflections when designing high-speed PCBs. Talk to an Altium expert today to learn more or continue reading about signal integrity tools for PCB designers in Altium Designer®.
1. Ritchey, Lee W. and Zasio, John J., “Right The First Time, A Practical Handbook on High-Speed
PCB and System Design, Volume 1.”
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