Series Termination Resistor Calculation
Table of Contents
You might need to determine the right series termination resistance value for this type of circuit
With transmission lines, some things never seem to be simple. Determining the termination technique and the values of components in a termination network shouldn’t be a difficult task. Most PCB design programs force you to look online for calculators, or you’ll have to run the calculations by hand. Instead, your design software should make it easy to test a range of component values in your termination network.
Some components, traces, differential pairs, and interconnects that route through vias should be impedance matched in order to prevent transmission line effects from arising in high speed or high frequency circuits. While you can get away with small impedance mismatches, some signal drivers will have an impedance that does not match the standard 50 Ohm value typically used with signal traces. One should note that some routing and computer architecture standards (i.e., PCIe Gen 2 and Gen 3) also use a different value for differential pair impedance.
Whenever the propagation delay along a trace becomes longer than one quarter of the signal rise time, your trace will start to exhibit transmission line effects. For analog signals, transmission line effects start to appear when the propagation delay is longer than about 10% of the oscillation period. In these cases, you will need to terminate your traces to suppress transmission line behavior and prevent signal reflection. Thankfully, Altium Designer® includes signal integrity tools that allow you to examine potential signal integrity problems and experiment with possible termination networks. These tools are accessible within the unified design interface, and you won’t have to access an external program or buy a new extension.
There are several answers to this question as there are several possible networks. The correct answer really depends on whether you will need to increase or decrease the impedance of your transmission line. In addition, different components may need more than a simple resistive network or an RC network. For example, an antenna will need to use an LC network, and the exact placement of the inductor and capacitor (either in series or as a shunt element) depends on how you need to shift the impedance in order to match the resonance frequency.
With series termination resistance at the driver, this is appropriate in two particular situations:
- If impedance matching is needed between an unterminated driver and the trace, and the impedance of the signal driver is smaller than your trace impedance
- If the signal being produced by the driver needs to be slowed down, which might be used in a fast interface instantiated in an FPGA or when the siganls being produced are controlled signals that do not supply a continuous data stream
In point #1, you can place a series resistor at the output of your driver, but this is very uncommon unless a standard single-ended digital bus (SPI, I2C, etc.) is routed over a very long distance. Point #1 might also be used in the case where specialty RF components are used, and these component do not have on-die termination. Point #2 is more common, especially when the signal is being sourced by a modern processor like an MCU, FPGA, or MPU.
We’ll take a look at determining how a series termination resistor can compensate impedance mismatch in a single-ended trace and in a differential pair. Here, you’ll want to set up a board with a pair of single-ended traces between a driver and a load, as well as a differential pair between a driver and a load. You’ll need to assign net names to each trace in your schematic. Don’t forget to add “_P” and “_N” to the net name for the differential pair and assign a differential pair directive in your schematic.
The signal integrity tool for designing a termination network functions by iterating through a range of component values. Your job is to choose some maximum and minimum values for your components in this network. Once you run the simulator, you’ll see a graph that shows how each component value in the network affects your signal. This allows you to visually determine the best component values to use in your termination network.
Once you capture your schematic and layout your board, you’re ready to determine the appropriate termination resistor for your traces. Once you have your board prepared, you can access the signal integrity tool in Altium Designer from the Tools -> Signal Integrity… menu.
Accessing the Signal Integrity tool in Altium Designer
Once you’ve opened up the signal integrity tool, you should see the Signal Integrity dialog shown in the image below. Here, you’ll need to select which signal nets you want to examine. You can double click the signal nets you want to examine, and these will be added to the table on the right side of the dialog.
Choosing nets and termination networks for your signal integrity simulation
You’ll also see a list of termination networks. In the example that follows, we’re going to examine two single-ended traces (NC1 and NC2). Note that you can change the number of sweeps, as well as the parameters in the termination network. You could also examine one of the differential pairs (i.e., NC3_P and NC3_N) using the same steps presented here.
We’ll look at a series termination network, as well as the “Parallel Res to VCC & GND” termination network. Note that you can choose the maximum and minimum values for your sweep, as well as your VCC voltage.
Here, you can modify the values of the termination resistors in your matching network
Now that you have set up the simulation, click the “Reflection Waveforms…” button to start the simulation. Altium Designer will iterate through the various resistor values and generate a series of graphs. The results for nets NC1 and NC2 are shown in the figure below.
Signal reflection results for various matching networks
From the results above, we can see that the series matching resistor (top two graphs) and the combination of resistors to VCC and ground are actually not the best choices for this board. Both results help reduce ringing somewhat, but we also need to compensate for the slow rise time. Therefore, we should try a different network and repeat the process.
Here, we can go back and choose the “Parallel Res & Cap to GND” network and check to see how this network affects the signals in nets NC1 and NC2. The results for this network are shown below. To see the values for each component in the network, just click on one of the labels in the legend on the right side of the graph. In this board, it turns out that the optimum trace network uses a 56.67 Ohm resistor and an 83.33 pF capacitor (the red signal in the bottom graph).
Signal reflection results for the resistor/capacitor network
To examine a differential pair, you can go back to the Signal Integrity dialog and add both ends of the differential pair to the simulation. You can then check termination using the same steps as you would for a single-ended trace. You can also try working with other matching networks to see which produces the best results.
Without a doubt, your best bet is to use impedance controlled routing so that you can ensure your traces will have consistent impedance values throughout your board. Ideally, this will help avoid the need to apply a termination network to every single trace in your board, saving you a significant amount of design time.
Determining the right termination network to use in your PCB is much easier when you work with a PCB design package that includes power design and simulation tools. With Altium Designer, you’ll have full control over your layer arrangement and design, and your simulation tools will take data directly from your layout. These tools are directly adaptable to rigid-flex and multi-board systems.
Download a free trial of Altium Designer to see how the powerful signal integrity tools can help you. You’ll have access to the best design features the industry demands in a single program. Talk to an Altium expert today to learn more.