Cutting Edge Technology in Packaging with an Interposer

In this episode, our guest Joe Dickson, tells us about the cutting-edge technology implemented in advanced packaging at Wus Printed Circuit International.  

Listen to Podcast:

Download this episode (right-click and save)

Watch the Video:

Show Highlights:

• Joe Dickson talks about what they do at Wus, a printed circuit manufacturing company
  • He shares about their efforts to bring PCB technologies farther up by introducing advanced packaging options
  • He briefly describes what printed circuit-like materials are, also known as the vertical interposers or PCIe
• Zach explains how a pre-packaged chip can be mounted on a board
• What are the reliability and signal integrity challenges that come with assembling different packages on a board
  • Off-the-board solutions start to become more and more desirable 
• The flexibility of design and components is what driving the market to use more integrated packaging
• Speed is everything! When will the industry move on from copper and go to optical? 
• Knowing what's going on in simulations is very important; it opens opportunities to try new things
• Joe explains a way of using Faraday cages with cable connections on the surface
• Examples of the large market using the PCIe method are Xilinx and NVIDIA
• How far is silicon photonics from becoming mainstream as an interconnect technology?
• Standardazion versus innovation
• The future of PCB assembly is hybrid. Some will use the off-shelf, best-in-class products from Intel, AMB, NVIDIA, Xilinx, and get creative with them. 

Links and Resources:

• Connect with Joe Dickson on LinkedIn
• Visit Wus Printed Circuit International website
• Watch the related episode:
  • Eliminating Nuances in the PCB Manufacturing Processes with Amit Bahl of Sierra Circuits PCB
• Connect with Zach on LinkedIn
• Full OnTrack Podcast Library
• Altium Website

Claim the special offer for Podcast listeners only

Transcript

Joe Dickson:
There's no longer a CPU centric world anymore, where the baseboard basically routed everything in and out to a central processing unit. That's no longer the case. And it's not only moving in a different direction, it's flying in another direction.

Zach Peterson: 
Hello everyone and welcome to the Altium OnTrack podcast. I am your host, Zach Peterson. And today we're going to be talking with

Joe Dickson, SVP at Wus Printed Circuit International. This is a company I am not familiar with, but I think this is going to be a great opportunity for the listeners to get introduced to some of the cutting edge technologies being implemented in advanced packaging. Joe, thank you so much for joining us.

Joe Dickson: 
Thank you. 

Zach Peterson:
So why don't you tell the audience what it is you do at Wus. I mentioned advanced packaging, but I think maybe you could go into a bit more detail.

Joe Dickson: 
Yeah. Initially we're a print circuit manufacturing company and quite a few years ago, we started moving into upper level, what I would call, off the baseboard technologies. It's difficult to fully define what they are because the industry hasn't really classified them yet, but we do die to die structures that involve different types of print circuit like materials.
 

Zach Peterson: 
So when you say printed circuit like materials, you mean like a substrate for multiple dies in heterogeneous integration?

Joe Dickson: 
Yes. Many of the current technologies have specialized material sets, ABF materials, and they build up using those and they do effective job. We're trying to move more and more of the PCB technologies farther up the food chain. That's what my group does.

Zach Peterson: 
And it's essentially, I think for the designers who aren't familiar, maybe, with some of these advanced packaging concepts, but it's essentially like taking what you would normally do with a bunch of off the shelf chips that are already prepackaged in epoxy and leads and everything, and then instead of individually packaging them, you guys are essentially building the interconnect structure that can be used to connect all of these different dies together.

Joe Dickson: 
Yeah. That's exactly right. There's a flexibility when you can do that. For years, we've had, what we call, interposers that are vertical interposers called PCIE. People could say, "Oh, they're cards. They're printed circuits." But really, in reality, they're an interposer. They actually just vertically connect to the baseboard. We still do a huge volume in those types of technology and they're getting more advanced. But we also do the mezzanine type connections where they're horizontal and high speed connectors that are just off of the board.

Zach Peterson: 
And when you say mezzanine connections, you're talking about taking what would've been classically called an interposer, and then just throwing some mezzanine connectors on the bottom, and that really is your interface onto main board.

Joe Dickson: 
Yeah, exactly. Many of the large ship manufacturers have their own technologies for these,  like CPUs directly with an LGA type compression fit. But we're doing more and more of these structures. FPG has evolved beyond just being a single chip interconnect to multi-chip. And it gives customers flexibility where, if they need maybe a specialized chip from one manufacturer or multiple manufacturers, they can design their own structures and mezzanine, and both horizontal and vertical interposers, and actually mount them directly into their baseboard.

Zach Peterson: 
So I think when folks start to, or some designers start to visualize what it is you're talking about, I think it's easy to think about a little module like ESP 32. You got a chip, it's prepackaged. You've got the little ESP board, it's on typical FFR4 materials, and then it's got castellated holes or whatever around the edge, or maybe it comes on it with a pin header, and then that plugs into a main board. And it sounds to me like you're essentially eliminating the bottom half or the top half of the die package/PCB and essentially putting this all into a prepackaged thing that can then just go right onto the board. So you've eliminated one layer of that interconnect by going this advanced packaging route.

Joe Dickson:
Yeah. Your description is very accurate. It's driven by value. If you're in a technology that is not yet evolved to the point where you need the high speed type signals that would be involved in that, or there's still capability to mount it cost effectively that way. It's much easier just to put it in an insertion, either pin it in the board. The difference now though, the 2.5 and 3D chip structures have changed everything. There's no longer a CPU centric world anymore, where the baseboard basically routed everything in and out to a central processing unit. That's no longer the case. And it's not only moving in a different direction, it's flying in another direction, where the options, not just GPU, AI, those are some of the ones, but the RF applications, the optical applications, the ability...

Signals don't need to come in digitally and leave digitally. They can come in at any, and  optically. There can be RF. And it can go off. And what happens is, if you put all of that onto your main baseboard component, you have no ability to lower costs or sometimes you can't even route it on a traditional single baseboard. But coming off the board, very similar to what 2.5 and 3D are doing, we go upwards instead of just out. We're able to make smaller products that are much more advanced than a baseboard would ever be. In fact, many of the customers that we're talking to, their baseboard is looking more and more like a back plane would've been five years ago when you plugged them in and had server switch cards. And the back planes were basically just large signal plane with no reflow components on it at all.

I see a trend back to that. I've been in the industry long enough that the cycle just keeps coming back. The challenge was, how do you interconnect some of these things and how do you make the interconnects reliable all the way through it? And there's a variety of new technologies, but we feel like we've got some that are pretty exciting that changed the rules a little bit.

Zach Peterson:
There's a couple things to unpack there, but I think one of the things you brought up was reliability. And I think this could come in two different forms. There's the reliability of the interconnect in terms of the structure going from this package into your baseboard and then over to another package and all that copper that sits in between. But then I think there's also the signal integrity aspect, which is, did the design that you create in your CAD tool actually turn out to function as you intended it to function, given all the manufacturing processes involved?

Joe Dickson:
Yeah. Everything you said is true and even taking it to the next step. Almost everything we have now from a substrate is a buildup. You have layer by layer buildups in the initials, unless the chip is put on last. If the chip is put on first and it's built up from that, then there's soldering, there're multiple layers of bonding there or you may skip some of those layers and do build up directly on it. But the challenge is, that isn't really talked a lot about in the industry is that these layers have to be known good layers. And you have yield impacts, you have cost impacts on all of those. And so even in print circuits, the next generational technologies to make baseboards much more advanced than they are, has been there since we built boards in the early '90s, late '80s that had very advanced HDI buildup and could have done it easily then.

The problem almost explicitly always was yields. The smaller the package is, the more controlled you can make it, the more cost. That goes all the way to the die. You look, even with die manufacturing, they have the ability to isolate defective products and be able to build on. And I think that's something that is not completely looked at when people are looking at interconnect structures.

Zach Peterson:
So with the materials and the structures of these packages, you mentioned something called known good layers. What exactly is that?

Joe Dickson:
Well, when you're looking at it from the silicon down, from the die down, each industry has different classifications of what that means. But I'm focusing it more from the PCB up. Looking at HDI buildup for print circuit boards or any type of technology, the challenge is that you don't want to induce failures early in the process and just build on them. And the larger that the board size is, the more that can be. One of the advantages we have is, we've been working for years on extremely large panel processing. And when we've built 3 ft by 4 ft back panels, huge, thick boards. So our technology is all driven around larger and larger panel sizes. That's important if you want to be able to make money, actually building these things.

But what also is a struggle is, you start to see the limitations of every technology and pinpoint failure modes. And if you have a pinpoint failure mode in a single location, you have a large structure, your cost goes dramatically up. That's why off the board solutions start to become more and more desirable because you have very isolated areas that, on a typical panel might be two up, but on an interposer type panel is 20 up. All right. You can sacrifice one piece per panel and not really have a problem, but you could have 50% yields if you scrap the two up. So all of these things are not new understandings in the substrate world and in the die world, but in print circuit manufacturing, it's becoming a very significant issue because area real estate and area engineering is very important now. And you're not limited, as I said earlier, you're not limited to 2D structures anymore. You can go upwards. Z is just as important as X and Y now.

Zach Peterson:
When you say go upwards, we've been talking about that with the 3D printing companies forever, ever since I first got introduced to some of those folks. And they're talking about, you can do sideways visa and these crazy coaxial things and stuff like that.

Joe Dickson:
Yeah.

Zach Peterson:
So when you say design vertically, are you talking about the typical printed circuit board types of structures that you would see actually now going vertically? Or is this just chip stacking or is it both?

Joe Dickson:
Some of the materials are similar to print circuit, but just about everything else changes it dramatically. That's a pretty good point. I've talked to the print companies too, in fact, we're collaborating with some of them and we tell them, don't try and build an 18 by 24 inch panel in [inaudible 00:13:33] printing. Print a quarter inch by a quarter inch application on a single location and then let us build the rest. That's the type of applications that I see that could be very quickly, almost without exception, the technologies that I feel that could have been much farther along, those types of technologies, for example.

Focus on flex cabling, things that are flat easy to print, are not necessarily mainstream from a RDL, redistribution layering standpoint, maybe not their most exciting thing, but could easily be transferred into this. But that's the X and Y location. We also have Z interconnect structures like vex, for example, that we feel is a game changer. Because in today's market, you can do HDI buildup, every layer has to be designed and laid up individually, almost like a jet printer printing, although it's electrolyte plating and stuff. But this one can cut through five, six, eight, 10, 12 layers at once and create connections from the surface to the thing, so you can bond them all in a single lamination. And that's very game changing. Deep blind connections have really not been in the industry before now.

Zach Peterson:
Well, in terms of the market drivers for this, this greater complexity, obviously, someone has to end up buying it at some point. What are some of the market drivers for it beyond just, hey, we want to get over the next hump of Moore's law?

Joe Dickson:
Well, without giving up too much on that one, the main drivers I think are flexibility. You hit it when you first started, the conversation is, flexibility of design and components. In today's world, sourcing can be a real challenge, and some of the larger sourcing, you may have a perfect design for an AI application and you need a CPU and you need a GPU, and you need an AI chip, and you need something else, and you can go buy their complete package or you can not have a product. And that's where FPGA, some other types of things, and I really think that's where design is evolving is that design is not going to be just routing components anymore. The engineering of the design world is going to move up. They're going to be looking at alternates. Which ones go best together? Which ones can be closer together?

How do you route it efficiently to where you can do that? How much of the RDL layering do you need to do in the substrate? Because you want to keep that to a minimum because it's so expensive. How much can you do of the RDL layering below that in the PCB? And possibly even get longer signals because one of the advantages we can do with some of the PCB materials is, we can shield it easier than you can in RDL. We can do a lot of things with the signals that maybe go two, three, eight, 10 inches, where today they go just a little over an inch. I think there're some benefits there.

And then last is speed. Speed is everything we're moving so quickly to optical hybrids. The question's always going to be, when do we leave copper? When do we go to optical? The question isn't anymore, are we going to optical? It's how far can we go with copper before we have to go to optical? Well, we're doing stuff now that I thought five years ago, there's no way this could be eight inch signals and do this type of speeds in copper. And we're still not at the wall yet. We still have, I think, one more generation to go. So it's exciting. It's fun. To me, it's the single biggest paradigm shift in 40 years of working in this industry.

Zach Peterson:
So this is interesting because I've thought of the role of the designer moving up as well, to a point where they're not just selecting components, but where the CAD tool now plays a role in the actual package design and they are selecting dies, like we've been talking about. And it sounds like we're starting to see that at the larger companies that actually have the scale and are going to produce at the volume where the economics start to make sense. Is that really where you're seeing the focus in terms of the market drivers?

Joe Dickson:
Yeah. I think that's fair. 10 years ago I worked at Cisco in their advanced print circuit and technologies, and everything was semi siloed. They were very advanced and they collaborated incredibly, and they hired people like myself from the industry primarily to bridge and help collaborate. So they did a lot of really bright things. But it's even more at another level now. Some of the SI engineers know how to use CAD tools and some of the power engineers are using CAD tools, and some of the designers are going back and learning signal integrity. I think that is exactly where it's going to go. The evolution, and we haven't even touched on power, which is a whole other, it's probably a whole other conversation. This is creative.

And you'd be amazed how many people tell me that are my age or near my age, "Oh, no. You can't do that. You can't do that." And then I talk to somebody who's 35 years old that's been in the industry for six or seven years. "How do we do it tomorrow? What do we got to do?" And it's amazing because that's the new generation. And so I feel almost more a bond with the young engineers now because they want to try, they want to look at it. They haven't failed at these old laws that no longer, they're no valid. They're thrown away. I thought Moore's Law was amazing that a man could do what he did, but it's time. Let it go. Come up with a new law. Something else. The Manhattan law or something else because Manhattan routing is here. You want to get from point a to point B, it's not going to be a straight line. It's going to be what you create it to be.

Zach Peterson:
It's funny because, I recall back in my master's degrees days of 14 years ago, can't believe I'm saying that, 14 years ago, but I recall back in those days, taking some semiconductor design classes for my engineering credits, I was doing physics degree, but for my engineering credits. And even then it was still, the end of Moore's law. The next technology mode just over and over again. And it seems like we keep coming up with something to keep pushing the limit. Even if it's not just direct scaling all the time, it's still greater compute density and it's still greater feature density. And I think what you're talking about here with the advanced packaging is just one more push in that direction until we finally hit a wall, and then the entire technology has to change.

Joe Dickson:
yeah. We have to evolve. We do physical 3D structure simulations of interconnects. The one I said, vex, HDI, through-hole. We do these structures and we work with designers and they run them through their simulations and do power and SI simulations, and we modify them. And it used to be, we'd build 12, 15 different test vehicles over a year. We can do that whole thing in two weeks. But now that particular designer is almost an expert in the mechanisms of how it works, and they go from being nervous and a little bit timid to literally taking over the meeting by the time. And it's exciting to see that because that's really what this was, that's how it's going to go to the next phase, is that as soon as they've done some of these structures and they go through the entire die to die connections, and they study it, and then they simulate it, they see the flaws, but the rules tell them they can't do anything about it. And so they just push it aside.

That's going away. Once you simulate something, you say, "Wow, that looks like it's got an opportunity to work." Now at least you're going to look at it. You're at least going to say, "Okay. I at least want to try it."

Zach Peterson:
I've always said simulation, at minimum knowing what's going on in simulations, even if you don't know how to use one of these crazy products like COMSOL, but at least knowing what's going on in simulations is very important for the exact reasons that you've mentioned, because you never know when you might have to jump in and actually understand what it is you're looking at in one of those meetings, and then really seriously rethink what you thought to be the conventional wisdom.

Joe Dickson:
Yeah. And if you're buying a main chip and you look at the packages that are out there right, now there's some pretty amazing things that the leaders are doing, and I'm not taking anything away from that. The chip lit type technologies of what they're doing, they had an issue, they didn't know how to do deep line connection, so they put chiplets in. But it's relatively limited to a certain amount of products. And they want to sell their entire package, which makes perfect sense, with their main sales point. Whatever chip they have that's the best of what they do. But maybe that's not what you want. Maybe you need something else. And the idea that that's the only thing that's going to be in the industry is just not there. The medium to small AI companies are going to take over.

It's coming. And the question's going to be, how long will it take to get the supply chain up to speed so they can? Because if they were here today, more and more and more of that would be leveraged. And I get it from the major customers also. The huge network users, they also want their flexibility because they may have a special AI software that just is off the shelf, but it takes so much bandwidth and it runs so fast that they can't use conventional. They need something else. They need to hide in their own network servers. Well, they have that flexibility now. I think that it's coming and it's coming pretty fast. PCIE was a great tool to get us far along into here and even PCIE 6.0 is trying, where they're running cables off it. And you can even do optical transceivers off the PCIE.

So they've taken something that was really just supposed to be a graphic card connection and drove it, some really bright people, drove it as far as it could go. Now we need to look at mezzanine type buildups. How can that strategy, how can you get the signals and the chips closer together? I envision we'll even see mezzanine PCBs, where the PCBs are actually stacked and you'll see multiple chips and then heat sinks between them and all kinds of unique ways to get very advances connections between die to die.

Zach Peterson:
And then in terms of, if you're talking about vertically stacked mezzanine PCBs, something like this, it sounds like there is now a big responsibility on connector manufacturers to then step in and be able to enable that.

Joe Dickson:
And like we said earlier, the supply chain may change. I'm not really giving a lot out of school here, but there are companies that are trying to include those connectors inside of the logic, where you're not having to do it, or they're bonding capabilities where they have better direct contact. The lost levels of some of the most advanced connectors mezzanines, I'm talking specifically, is pretty impressive right now. But what they've got coming is, I think, even more impressive. They see it. They're the first ones in line to do the cabling, flyovers that many different companies are doing already.

I don't have to give names, but if you go on the web and you look at cable flyovers, there's companies, specifically one, that will pop up, that has been doing this for three or four years. And they're doing all of this type of development with the flyovers and attempting to try to keep budgets as low as they can. It's very challenging because the connectors, like you said, for that type of thing. That's why being able to keep them as close to the board as possible, insulating them, shielding them, creating new types of bonding profiles, not necessarily just... Today we use grid or hex BGA pads. In the future, I see us using Faraday cages with almost like hex or cable connections on the surface, matching what a cross sectional thing of what a flex cable would be. Those types of connections.

Zach Peterson:
That's really interesting. I envision when you say that, maybe, a vertically oriented connector, let's say, with the leads or the contacts, coming out of a fully shielded, what looks like fully shielded Faraday cage almost. So it's almost like you got a big metal enclosure around this connector and then the leads poking out vertically. Is that what you're thinking? Or am I stuck.

Joe Dickson:
No, no. When we started testing above 60 gigahertz speeds and digital signals, and most people say, "Oh, I'm not running 60 gigahertz." Yeah. I know. But it's coming fast. But when you start testing above that, there's actually test heads that are bonded, that can be bonded at the board and give loss levels low enough to be able to route those in copper. When I first started using those, I was like, "Are you kidding me?" I thought 60 gigahertz, there's no way. 28 gigahertz was the top and we were going to optics after that. No. These companies are already starting to sell, and I'm not selling for Wus, I'm telling  These companies are starting at 90 gigahertz, 100 gigahertz connectors. And they're in the open market and people are buying them. There's a reason why they're buying them, is that they see, there are visionaries out there. There are a lot of people that are seeing that they're coming up.

If they're doing everything on a single baseboard, and they're trying to do everything through the CPU logic, and they have these commodity groups that never talk to each other, and you build a PCB here and you have a component here and you have a subject route here and you have all these different groups. And somehow they magically come together and some guy makes it work, those days are gone. If you don't have an ecosystem engineering group that can take the design and walk back through it and tools, like you were just describing, being able to do more than just PCB design. PCB design that's fixed into where the chips are going and being able to do the simulations, both electrical and thermal, and being able to run all of the CT mismatch capabilities and aligning all that, and getting that done.

That work can be done before a design is done. And that's the part for me, that's the most exciting that for my last few years in the industry before I retire, that's what I'm excited about, is seeing it finally mature and grow up to where I really think the silicon and die, and substrate industries have been for years. See the whole industry come up to that level.

Zach Peterson:
Yeah. There's a real serious integration going on here between all of these different designers or parts of the system, I guess, designers that, I guess, for so long were siloed. And we always talk about de-siloing your design team, but this is really like de-siloing across the industry. Standards play such a big role in that. Standards in terms of interface standard, let's say. That's what really allows two chips to communicate with each other. And chip A knows what chip B expects and vice versa. And then at least the PCB designer can step in and say, "Okay. I know how I need to place and route all of this." Are there standards being developed for these packages and specifically for the dies on packages? I seem to remember reading something about chiplet standards being developed.

Joe Dickson:
Yes.

Zach Peterson:
I've got so much stuff in front of me to read at any given time, I just didn't have time to dive in.

Joe Dickson:
I was a part of the HDI standard 25, almost 30 years ago when IPC developed it. I was part of the through-hole standard, right after I left HP back in almost 40 years ago, and working with some of the leaders of the industry that were there at that time. To be honest, that's a Pandora's box that almost is another complete thing is, that the days of being able to build standards for these types of things and assuming a design is almost the same for everything, are almost gone. You really need to be able to go in and have your own reliability, a testing capability, be able to build it, the reliability matching your designs, then go back and demonstrate that. And then build the standards of the materials as an engineering standard. And then simulate those standards first.

And then if you want to step beyond the, and challenge the simulations, then you build product ideas and you can re-identify the fudge factors in the computer simulation. But HDI buildup is one that people talk about. You say, "Oh, I can do six layer HDI buildup and never have a problem. I can do four layer HDI buildup. Or I do three layer and I have problems all the time. Why is that?" And it's because they don't do the physics behind it. We do CT mismatch between the via and the dialectics. We do the glass resin ratios. We do fillers. We know exactly where everything is inside that structure. And then you run that simulation, you say, "Wow, that's weird. The failure seemed to match exactly what they told us it would match." Yeah. It's physics. It works. That's where I think the standard should go.

Having another set of laws that says that you can't do 0.1 millimeter thick dielectrics here or this spacing needs to be here, or there, I just think it's going to be a waste of time because by the time you're finished, it's obsolete and you're already onto the next layer. The materials have their own dialectic installation, resistance values. They have all those things. So I'll get off that my soap buck on that one, but I pushed hard to get some standards on where PCs would go with 2.5 and I think part of the pushback I got was because a lot of people consider it an IP right now. Once they do their recipe, they don't want to share it with everybody. There's a lot of that in the industry right now. There is not a lot of collaboration coming off the board. I have very large companies tell me, I don't hear anyone doing this. And I just, okay.

They are and they're doing it with a lot of companies. And if you don't know about it, it's probably because someone in your group is not telling you. Because this type of off the board thing isn't even called a substrate. It's not really called a PCB. It's called something else. But if you go on LinkedIn and you look at job descriptions, there's thousands of jobs for this exact same description of being able to interconnect engineers that can take die to die interconnects and be able to do off the board technologies.

Zach Peterson:
When you're talking about the folks at different companies, thinking that what they did in their design and the interface that they implemented, physically, at least, being their IP. That's really interesting because I think one of the points behind heterogeneous integration and then all of the packaging technologies that built up around it to support that goal was to give people the flexibility to be able to go to wafer vendor A and pick their die and then go to vendor B and pick their die, and mix and match just like we do with any other set of components that you would just buy off of Mouser or Digi-Key, and then just route them all together. And so essentially, bringing up the designer from the board level into that substrate and packaging level, it would almost require that folks do that. And it sounds like nobody's wanting to do that because it's so new and it is still in that really advanced area that maybe there isn't that incentive at this point.

Joe Dickson:
Well, you have a lot-

Zach Peterson:
Or is there just no marketplace for it?

Joe Dickson:
Well, I think you have both sides. I think you have a large market that has used the PCIE method. I'll give you two great examples, Xilinx and NVIDIA. Both of them literally built their companies on that structure. Very flexible, could plug into anything. You could use it in a graphics. You could use it even automotive. You could do whatever you wanted with it. And at the lower speeds, that was a perfect transition. Well, NVIDIA saw early that's not going to be good enough, so they created their own NV link. Xilinx now ran that envelope, the PCIE side, all the way up and pushing 5.0 and 6.0 so they can keep taking advantage of that for the . But again, every one of these companies that's pushing the PCIE vertical interposer is seeing the speeds that are coming out of these next generational chips, are a factor of 10.

They very. And the issue with a vertical connector is the signals are long. They're really long. They have to run a long way to get to the connector. They have to run into that vertical connector process in there and then go back or come off. That can be eight, 10, 12 inches. That sounds like not very long, but it's huge in this market. When you can do the same thing in three inches or four inches. Now your material sets open up. You can use a variety of different materials. You can get your DB per inch loss values, are not as critical for that speed as they were before because you cut the length in half. Then you start, okay, how can I get rid of other loss? Well, that's where we use interconnect strategies and ways we can do it and shielding, and some of the other things that we want to do.

But it's just basic structuring. You look at it. How do you make it closer together and how do you make it more reliable? So the key is, it has to match PCIE level, at least, PC level interconnect reliability because that's the industry standard. Our expectation is that it's going to be better. So that's where it needs to be. And if it's not, then it's probably not a full value.

Zach Peterson:
Okay. And now you can start to see, I think, if you're been involved in or looked at any of these technologies for a long period of time, you can start to see where photonics comes in as being the next way to get over that speed, I guess, that speed barrier, that speed limit with copper. Let me think here. The last time I talked to anybody in the electronics industry about silicon photonics was three years ago. So I was at an IPC, or not an IPC, I was at an IEEE conference and it was one of the photonics society conferences. And they actually had the father of silicon photonics there presenting some research, and they had an entire set of discussions and paper presentations on silicon photonics. It was really cool, but I think at the time it still seemed pretty far off, decade-ish kind of far off. And I think that's one area that I'm seeing to maybe accelerate coming soon because of the drivers that you're mentioning and this need to get over that next speed barrier. Where do you see that coming in and becoming mainstream as an interconnect technology?

Joe Dickson:
Well, 2.5 and 3D type structures enable that.

Zach Peterson:
Sure.

Joe Dickson:
What people really don't realize yet that even if you're talking 5G or 6G, or whatever application you're using, even in network where you have high speed and semi high speed. We now have semi high speed signals, high speed signals, ultra high speed signals and oh, wow signals. But what I've noticed is, there's never 100% of any of them. And so the idea that you're going to do anything involving optics is probably, you're going to walk into it. There might be a certain percentage of those contexts that are optical and you're creating a smaller area, but the rest of the net can still stay copper because it's more cost effective. So I could easily see something on the board where you had a chip and that chip was not just an optical transceiver, but it was actually doing optical processing.

But it needs power. It needs to be able to drive that and receive it, and then be able to interpret it and then communicate it off. That comes back to a simple person like. It either is driven through the copper or is driven through the glass, but you're going to have some form of communication there and you need that transference. And I think it's coming. In fact, I don't think it's coming, I think it's already here. The question is, is the application and the software ready for it yet? We're probably going to be ready by a hardware standpoint by the time, to be there. That's one area that I think we might be able to do. The next generation super high speed connections, I'm not so confident our supply chain is there. We're so tunnel vision on chip logistics and supply, we're not even looking at the rest of the ecosystem that needs to develop along with it.

But more importantly, the designers don't even know what are the options. And that is huge. You call on a print circuit manufacturer, you're going to get one thing, you call on a manufacturer, you're going to get something. You talk to an OSET supplier, you're going to get a different thing. You talk to TSMC or at the foundry level, you're going to get another. Everybody's giving you their full solution. The question is, can you use that? And is that best for you? And a lot of times I think the answer's probably going to be no. We need something else because it's a medical application. It's not this or it's automotive. And vibration is super important. I can't just buy something off the shelf. I need something that's a higher level. These things are not really being addressed in the industry right now.

Zach Peterson:
It's almost like a standardization is cornering folks into a box to where they can't get to that next level of innovation, to do some of the things that you've just alluded to. So you mentioned the demands in automotive being different from the demands in medical, once you get down to this package and interconnect level. I think that makes sense once you break it into the reliability requirements and things like that. It seems much easier to see that the standards that we apply in medical now really don't make sense to also apply in terms of in automotive. But if you zoom out and you look at the assembly standards, the printed assembly, they're going to say, "Well, is it IPC class two or is it class three?"
 

Joe Dickson:
Exactly.

Zach Peterson:
And that's it. That's going to be your evaluation criteria.

Joe Dickson:
Yeah. And I know very high up, supply chain VPs that say, "Well, print circuits are basically cables." And you hear that all the time. And I say, "Okay." And I think the substrate world gets a little bit of that too. They get a little bit of, the die is everything and it doesn't really matter what happens after that. Just give it to me and make it work. And that's okay, but like I said, when it was a central CPU world, when everything was written, programmed to be a certain way, the rules were simple. It was easy. You just got better at what you did, but it was basically the same thing. Until HDI became mainstream only in the last decade, the entire time of the connections between chip to chip was a single technology through-hole. And it never changed. It got better, but it was always evolution.

The way that we build the materials were the same for 40 years. All of that I think is going to go away. I think in the next, between five to seven years, you're going to see that it just, all the rules that used to be there, where you said you have to do it this way because we do this, okay, well, I'm not doing that anymore. Because you can do that off the board. You can say, "Okay, I'm going to compression press fit this thing to the board. And so none of the thermal responsibilities that you were talking about have anything to do with what I'm doing. So I'm going to go off and I'm going to do something really exciting here. I'm going to make a pure glass layer because I'm going to do whatever, I'm going to do Teflon coding. I'm going to do all these things that you can't do on a baseboard and we're going to do it in interposers." And it's really going to change the way the industry looks at electronics, die to die electronic connections.

Zach Peterson:
So do you think a marketplace is ever going to develop to do the kinds of things that we normally do with printed circuit board design, but to then bring that into the interposer level? Let me give you an example. Today, you could design a printed circuit board. You have a bill of materials. You call up PCBWay or something, you want to order a $5 circuit board. And you get it fab. They send it to you, you assemble it by hand, that kind of stuff. And of course the processes are going to be more advanced once you get to that interposer substrate level, but do you see that same kind of marketplace developing where an individual designer or a small team at some company can say, "Yeah. We have these dies that we want to use. We need to design, the interposer now. So we need to design that next layer up above the circuit board." And then they can just call up some manufacturers and say, "Hey, can you build this? Can you qualify this for us?"

Joe Dickson:
Yeah.

Zach Peterson:
Do you think that marketplace is going to develop?

Joe Dickson:
I think the next generation of that is a hybrid of, we talked about it earlier, SI and power engineers that actually get involved in design. I think that discipline is going to take over the industry. You'll have companies that use the off shelf, best in class products from Intel, AMB, NVIDIA, Xilinx, those type of broad. They're going to use those types of structures and then are just going to be creative in how they do the software. There's nothing wrong with it. That's a brilliant business and people have made a lot of money off that. But there's also going to be the ones that say, "Hey, I do have one thing that's uniquely different. I have this and this, and this that are uniquely different and it doesn't function as good this way or it needs this."

And very much like what happened within NVIDIA with the designer that took a graphic chip and said, "I'm going to try and do some processing on this that isn't involving graphics," and look where NVIDIA is. It's amazing what they've been able to do off a brand new application of something. And that's where we're going. And the paradigm shift that I see people happen is they keep going, "Oh, PCIE is my solution, PCIE is my solution." And then it's somewhere, the train starts coming down through the tunnel and they go, "Wait a minute. I don't have a solution for this." And then that's when it gets fun. That's when they're excited. And that's where this year is. This year is just amazing. It's just blown up, where we're overwhelmed with how many of these super bright people are saying, "I need this and this and this, and this, and this. And I needed this way. And we simulated this and here's where the structure is and we're going to do this and we're changing everything. We're going to make the jump, while we still to build products that perform at this level. We're making the jump and we're going to build something in imperial."

And that's where we like to be, because that's the lowest level of risk. If they came here and said, "Yeah. I need it in three months and if it doesn't work, we're out of business," that's not the place I want to be, both as a supplier or involved in it.

Zach Peterson:
Well, I think the message I'm hearing from you, and this is consistent with a message that we got from Amit Bahl, who works at a PCB manufacturing firm, Sierra Circuits, the message I'm hearing is, don't be afraid to push the limits, whether it's your circuit board manufacturer or in this case, your substrate supplier.

Joe Dickson:
Yeah. He is a very bright guy.

Zach Peterson:
Yeah.

Joe Dickson:
I couldn't agree more. You looked at the leaders in the industry forever, Joe Phelps at Happy Holding. You look at the guys that have been trying to drive the industry to alternatives and then being pushed back by the commodity levels. And in some ways just [inaudible 00:51:38], because we hadn't pushed the envelope of alternate technologies and on the board. But we are approaching an area where, to do something on a single panel and try to run everything into it and out of it, is becoming more and more challenging. And the solutions to do that today are even more expensive than the alternatives. I look at it as, everything is evolving that way and it's coming, whether everybody's going to do it or not, it's just how they're going to do it.

Jumping back to optics just for a second, I think you'll see that. I think you'll see optical transceivers on boards because that's a cheaper way to do it than the silicon. You'll see a chip if they need it. You'll see four stacks of memory that go way up, really thick. And you'll see incredible, all kinds of layers in there of multiple chips. And you'll see some that have that single component and then you'll see some with four of those on a single PCB, and then that PCB mounts to the baseboard. And then the baseboard just becomes basically the power distribution method for the rest of the board. And that's where I think most products are going to go.

Zach Peterson:
Yeah. It's an interesting type of thing to think about because I still see so many of these products, and frankly, I have my own firm, but we design them, around, it's that central processor kind of system architecture. And then you just arrange the stuff around it and very carefully route them so that you have signal and power integrity and can pass EMC. And I don't think that's going away necessarily, but I agree with you that the more advanced stuff is not necessarily going to look like that and it is packaging that enables that.
 

Joe Dickson:
Yeah. And I agree with that point, is that everything's in percentages. Even some of the most advanced stuff that we're talking about, they're talking 12, 13% of their signal processing is going to be that. The rest of it's going to be sub 28 gigahertz. Okay, well, don't use the same rules for everything. If you need something that's at 60 gigahertz, design that area around it and then keep everything else as robust as you can. Yeah. I just think that the design engineering discipline as a whole is taking another level. It's just going to move way up and it's got to have the extension of each types of the manufacturing industries directly tied to them, so that you can apply these. Because nobody coming into the industry right now is going to know all this stuff. They're going to need to be able to rely on that a little bit.

Zach Peterson:
Well, we're getting up on time here, but this perspective is so valuable. I feel it's very valuable and I hope the audience feels is very valuable as well. So Joe, I want to thank you so much for taking some time out of your day to talk to us.

Joe Dickson:
Thank you. Yeah. I enjoyed it, as you can probably tell.

Zach Peterson:
Yeah, absolutely. And we're going to have some great resources in the show notes. You can go learn more about Wus. And everyone that's out there listening, don't stop learning, stay on track and we'll see you next time. Thanks everybody.