How to Take a Phase Noise Measurement in a PCB
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There are plenty of noise sources in your PCB, ranging from thermal noise to EMI received from external sources. Phase noise is one noise source that occurs in analog signal sources like reference oscillators and frequency synthesizers. This type of noise affects the timing of analog signals and it arises due to contributions from other noise sources. If you’re debugging a high frequency board with a reference oscillator, then you might need to gather a phase noise measurement from the failing board section, or from your clock.
Phase noise appears as random variations in the phase of a waveform being produced by an oscillator (crystal, PLL, circuit, etc.), frequency synthesizer, arbitrary waveform generator, or other signal source. Applications that use a reference oscillator for timing or modulation/demodulation purposes need to have a stable oscillator with no drift, phase noise, or amplitude noise.
Phase noise is identified through direct measurement of the power spectrum of an oscillator or other circuit that produces a waveform in general. An ideal oscillator would only generate a pure sine wave, and its power spectrum would look like the pair of confugate Dirac delta functions shown below. In other words, all the power in the signal is contained at a single frequency (positive and negative components). When phase noise is present, the power contained in these confugate peaks is spread out over some bandwidth; larger phase noise leads to larger spreading.
Jitter is the manifestation of phase noise as seen in the time domain. Jitter can be seen directly in an eye diagram and is easy to identify. Normally, the RMS jitter is the important parameter used to quantify acceptable BER values. To see an example of jitter in an eye diagram and how it can be quantified in the time domain, take a look at this recent article.
These two concepts are related but are generally used in different domains. Digital designers generally use the term “jitter” to refer to timing noise, where there are variations in the time at which a signal swing is measured after it is launched on an interconnect. The analog designer is more likely to use the term “phase jitter,” referring to random variations in the phase of an analog signal but defined in the time domain. The terms are conceptually related, but practically jitter in digital systems may have sources that are not necessarily responsible for phase noise in an oscillator or other analog circuits.
In the frequency domain, the effect of phase noise measurement might look something like the graph shown below (image credit: Wikipedia). Here, a signal is sourced with carrier frequency at f0, and there is a weaker frequency being sourced at f1. The presence of phase noise on f0 effectively increases the signal’s bandwidth and raises the noise floor. If the signal at f1 is weak enough, this signal will be hidden behind the phase noise from f0.
The important point here is that the power concentrated in f0 leaks into the bandwidth occupied by f1. In RF signal chains, either on the Tx or Rx side, phase noise from one signal can leak into adjacent channels, essentially as a form of crosstalk but without coupling between interconnects. The result is frequency mixing between a reference oscillator and a signal in the Rx or Tx side. If these signals were to mix in a nonlinear circuit, you would have additional harmonic content generation.
In the case of digital phase modulation (or PSK modulation), phase noise is visualized as variations in a constellation diagram. If phase noise is extreme, you have a signal that could be interpreted as having the wrong encoding as power bleeds from one signal level to another. This is shown as example below.
In this constellation diagram for a PSK-modulated signal, we can see how phase noise affects signal interpretation by moving each symbol around a circle in the complex plane, representing phase variation. Normally, there would also be some amplitude noise, which would also modulate the radial distance for each data point.
A phase noise measurement can be gathered directly from your board using a spectrum analyzer with a near-field probe and a low-noise preamplifier inserted in the front-end. Phase noise can also be measured with a spectrum analyzer connected to a DUT with a test fixture. Here, you’re measuring a power spectral density, so the phase noise you measure is a function of the measurement bandwidth. Note also that the phase noise measurement results from a DUT or circuit will only be accurate of the DUT/circuit's phase noise is large compared to the phase noise of the spectrum analyzer's local oscillator.
Once the power spectrum is captured, the phase noise can be calculated. The accepted standard is to calculate phase noise values at multiple offsets from the carrier frequency within a 1 Hz bandwidth. For a specific offset (chosen by the experimenter), calculate the phase noise at each center frequency in the 1 Hz bandwidth at each offset value using the following formula:
This gives you a value for phase noise at multiple offset values. Finally, for an oscillator that is intended to be used as a clock or as a reference oscillator, it is desirable to compute the RMS phase jitter within the desired bandwdith. To determine this value, construct a graph of the measured phase noise data at successive offsets and calculate the RMS we can now determine the RMS phase jitter with an integral. To determine the phase jitter, plot the calculated phase noise vs. offset frequency, apply linear interpolation, and calculate the RMS value for jitter with the following integral:
In this equation, the H(filter) term is a transfer function that is pre-defined based on a particular signaling standard or application. If not specified, it is appropriate to set this term to 1 and integrate. Otherwise, such as in serial I/O standards, this function and the required bandwidth will be specified for you.
When interpreting power spectrum measurements for purposes of identifying noise sources, your goal is to identify the most prominent sources of noise that you can reasonably link to some problem in your test board, circuit, or component. Common sources of phase noise are:
- Noise coupling from a switch-mode power supply into the feedback line of a precision oscillator or the power source of an oscillator circuit.
- Thermal noise: phase noise is larger at higher temperatures. Shot noise and 1/f noise are also important.
- Variations in dielectric constant of your substrate across the bandwidth of your waveform. It is best if the dielectric constant does not vary across the bandwidth of the waveform in the system.
- Inherent phase noise on a reference oscillator, or inherent jitter on the system clock. These are normally reduced in ultra-fast systems with a PLL.
The goal here is to identify the most prominent source of phase noise and reduce it first. If this brings your system within specs, then consider your work done. There will always be some amount of phase noise in a system, regardless of the Q value of your clock/reference oscillator. However, if you can get your BER values or other performance requirements within spec, then you’ve done your job successfully.
You can spot the culprit noise sources visually in a phase noise plot and compare them to known noise sources in your board. An example measurement with several phase noise spurs is shown below.
Notice the strong spurs in the graph above, which arise from a variety of sources. The noise above can be compared to the reference specifications for the relevant components in your board. This would be done by drawing a line through the phase noise spec point with -10 dBc/Hz slope; any portion of the noise spectrum that rises above this line would fall outside the allowed phase noise tolerance and would need to be suppressed in the design.
Acceptable phase noise levels can be quantified in terms of an RMS phase jitter value using the following formula. Note that L(f) is the logarithmic phase noise data, thus the odd factors of 10 appear in the integral to convert this back to a linear dataset. The integral here is taken over the relevant signal range.
Once you’ve determined any layout or component changes during debugging, the design tools in Altium Designer® are ideal for modifying your design and finding candidate replacement components. You can access the components you need from the Manufacturer Part Search panel, and you can easily modify your board with best-in-class routing and layout tools. You can also import your designs from other CAD tools and get the job done right with Altium Designer.