Addressing Skew Sources in High Speed PCBs

Zachariah Peterson
|  Created: June 8, 2022  |  Updated: June 10, 2022
skew sources high speed PCB

Sometimes, when we talk about skew, we aren't as specific as we should be. Most discussions of skew and jitter deal with the type of skew incurred during routing, namely due to length mismatches in differential pairs and fiber weave-induced skew. In fact, there are many different sources of skew that contribute to total jitter on an interconnect, and it's important to quantify these in serial and parallel buses that require precise timing control.

If you compile a list of skew sources, you'll see that fiber weave-induced skew is only one entry on a long list of skew sources. We'll look at this list of possible skew sources below, and we'll see how they affect the operation of your PCB. From the list below, we'll see that some of these issues with skew are not simply solved by paying attention to the fiber weave construction in a PCB substrate.

Jitter = Total Skew

The first point to note here is the difference between jitter and skew, as well as the difference between random and deterministic jitter/skew. Probably the best definition of skew I have seen comes from an old Texas Instruments application note written by Steve Corrigan. In this application note, Steve describes jitter as "the sum total of all skews". This should illustrate why some authors will sometimes use "jitter" and "skew" interchangeably (I've mistakenly done this myself). JEDEC has its own definitions for jitter and skew.

Random or Deterministic?

No matter which term you use, there is sometimes an association between "jitter" and random skew, while the term "skew" would be used to reference pseudorandom or deterministic skew. In reality, there is only one source of random skew: thermal noise. Random motion of the atoms and molecules that make up all matter does contribute to noise in electronic circuits, but it only matters in highly precise low-level measurements. In the majority of applications, the skew sources you need to worry about are deterministic and can be linked back to a root cause.

Sources of Skew

The table below shows a list of skew sources that can arise in a PCB, as well as a brief description where each arises.

Fiber weave-induced skew

Caused by the construction of PCB substrate materials being periodically inhomogeneous and anisotropic. Mechanically spread glass weaves are preferred to reduce this.

Periodic skew

Caused by periodic noise induced by other sources in the system, such as power rail noise induced by switching of high-speed I/Os.

Bounded uncorrelated skew

Caused by crosstalk; this skew is uncorrelated with the activity on the victim interconnect and so it appears random.

Duty cycle distortion

This can be a side-effect of another noise source. It refers to a case where switching thresholds or logic thresholds deviate from their ideal values, which displaces the rising edge of a pulse train.

Reflections

Reflections at the receiver contribute to intersymbol interference as seen in an eye diagram; in this case a reflected symbol can create an early or late rising edge on all subsequent symbols.

Data-dependent pulse-width modulation

This is a side-effect of bandwidth-limiting characteristics in a high-speed channel (e.g., dispersion in losses or termination, parasitic capacitance)

 

There is a lot going on in this table; we have multiple sources of skew have little to do with fiber weave effects and cannot be perfectly solved by applying length matching! However, if you look below the first row, we see that most of these sources of skew appear at the system level due to some interplay between different functional blocks in a system, or between chips and the board.

Can You Eliminate All Skew?

Unfortunately the answer is "no", you can't ever totally eliminate skew. Even if you suppressed all the deterministic sources of skew listed above, there will still be some amount of random skew due to thermal noise. Although you can never completely eliminate skew, you can work towards minimizing it with a few basic layout guidelines.

  • Glass weave: Use a tighter weave material like spread glass; this directly confronts fiber weave-induced skew.
  • Crosstalk and parasitics: Learn what cause parasitic coupling between two interconnects and plan the layout to reduce this coupling. The easiest way to deal with parasitic coupling is proper stackup design that enables appropriate ground placement.
  • Termination: Ensure channels are terminated with flat target impedance up to the required bandwidth limit for your channels. In other words, ensure channels are terminated at least up to the channel's Nyquist frequency.
  • Power integrity: Ensure components that require precise timing for high-speed signals or precision timing in edge rates are receiving stable power.

After dealing with these issues, standard differential or parallel bus delay tuning structures can be applied to compensate the remaining skew in your PCB to deal with any length mismatch. At this point, even if there was some residual skew in your interconnects, the majority of skew would be addressed and signals would still be aligned at receiver I/Os.

The routing featuers in Altium Designer® can help you apply accurate impedance calculation results as design rules, as well as design your layer stack in your high speed PCB to minimize noise coupling that contributes to the skew sources listed above. When you’re ready to share your designs with collaborators or your manufacturer, you can share your completed designs through the Altium 365 platform. Everything you need to design and produce advanced electronics can be found in one software package.

We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. Start your free trial of Altium Designer + Altium 365 today.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2000+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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