IEEE EPEPS 2020 Roundup: Get Ready for Advanced CAD and Modeling Techniques

Zachariah Peterson
|  Created: November 10, 2020
IEEE EPEPS conference roundup

The week of October 5, 2020, was a whirlwind thanks in part to the annual holding of AltiumLive. I did my best to attend some sessions at AltiumLive, but there were at least three other critical conferences I was invited to attend or present at, and I couldn’t hit them all. The other events of the week included:

  • Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), presented by IEEE Electronics Packaging Society
  • Electronic Design Innovation Conference (EDICON, Ongoing October 13, 20, and 27)
  • InnovationXLab Quantum Information Science & Technology (QIST) Summit

Between these three events plus AltiumLive, most SI/PI engineers I know attended the IEEE EPEPS conference, and I know I’ll be catching the on-demand EDICON sessions soon. Keysight’s Heidi Barnes was in attendance at the virtual Keysight booth at EPEPS, and she held a Q&A session during AltiumLive. It seems like we were following each other between both conferences on Wednesday.

The presentations at EPEPS are very revealing for SI/PI engineers, and high speed interconnect engineers, and anyone interested in novel field solver techniques. The presentations I saw at EPEPS are revealing as some of these new design and analysis techniques might end up in your next commercial field solver or PCB layout tools. In this roundup, I’ll gloss over my own EPEPS presentation and focus on the great interconnect modeling work and field solver work done by others in the field.

Trends from IEEE EPEPS 2020

As much as I’d love to give a detailed review of every paper that was presented at EPEPS, there simply isn’t room to cover results from all 43 papers. However, I’d like to briefly outline some broad trends and selected results that are quite relevant for PCB designers. This year’s presentations broadly fall into four areas:

  • Novel interconnect designs, including 3D interconnects
  • Advanced field solver and modeling techniques, including techniques for CAD tools
  • Measurement and analysis of high speed interconnects
  • Design optimization topics

Here are some of the notable advances in each area:

Novel Interconnects

Topics in this area covered new interconnect designs, both in 2D and 3D interconnects. Such structures included novel couplers, air-filled waveguides, and flexible RF circuits. The structures presented in this application area can be fabricated with standard manufacturing processes. Other topics looked at the use of graphene and carbon nanotubes as interconnect materials, although these materials are not yet manufacturable at scale with planar processes.

Perhaps the most interesting is the air-filled waveguide, which provides an ultra-low loss solution for low-level RF signals at very high frequencies. These waveguides take a milling and plating approach to create an open cavity in a carrier board. This open cavity is then plated with silver to give a high-conductivity waveguide structure. Electrical connections are then provided using WR12 connectors to the submount unit.

Advanced Field Solvers and Modeling

Field solvers are becoming more important for evaluating designs before they are sent off for manufacturing, and complex designs demand a simulation-driven approach with fast computation speed and high accuracy. Two notable topics for PCB designers include:

  • FEM vs. BEM simulation: Many commercial field solvers use finite element methods (FEM ), but results from boundary element methods (BEM) and method of moments (MoM) are more efficient for extracting S-parameters from Maxwell's equations and calculating the field distribution using the Green's function for a PCB layout structure
  • Automated linearization: Nonlinear circuits require a small-signal approximation for individual components, but working with a large network requires this technique to the entire network in different input voltage/current ranges. Bringing this into a field solver provides much more accurate results for radiated EMI from PCBs and ICs.
IEEE EPEPS boundary element method simulation in PCB design
Complex structures like this printed inductor can be simulated in under an hour with a boundary element method simulator. [Source: Sharma et al.]

Both topics aim to provide a set of baseline data for the next area: test and measurement in advanced electronics.

Measurement and Analysis of High Speed Interconnects

Test and measurement for signal and power integrity are critical during prototyping, and analyzing the results is critical to identifying areas of a design requiring changes. Some novel techniques for taking SI/PI measurements were presented, including high-frequency package measurements, signal integrity at connector sockets, and S-parameter measurements in 90-degree trace bends. In particular, 2x-thru de-embedding was discussed, which is a particularly timely topic given the draft passage of the IEEE P370 standard.

Design Optimization Topics

Rick Hartley gave a seminar on this topic for AltiumLive attendees, but the IEEE EPEPS presentations were much more focused. My presentation fell into this area, particularly for copper roughness and trace geometry, and I’ve written briefly on this topic on Altium’s blog. Papers in this track include the following notable examples for PCB designers:

  • High-speed design optimization using machine learning: Just as its name suggests, this paper focuses on the use of machine learning techniques to optimize high speed interconnects. This follows a trend from earlier IEEE EPEPS conferences and the broader trend of AI-assisted PCB design tools that are just starting to hit the market. 
  • Via design optimization: This topic is all about determining a via geometry that minimizes return loss on high speed interconnects, such as a PCIe Gen 5 channel at 32 GT/s examined in the paper. 
  • Directed search methods for decoupling capacitor selection: Some field solver products and online circuit model simulators can be used for decoupling capacitor optimization, where a group of decaps is selected to keep PDN impedance below some target. In this method, a directed search technique is used to determine the best set of decaps for PDN impedance reduction. 

This area is quite interesting as models determined from measurements and with field solvers can be used in design optimization or design exploration. This is one area where I would expect these advances to start making their way into commercial PCB design packages. The new Simbeor 2021 package is already a step in this direction, and it’s my hope that Altium will include these design regression techniques in their software in the near future.

 IEEE EPEPS machine learning in PCB design
Machine learning models can be used for eye width maximization in high speed PCB interconnects. [Source: Ma et al.]

When you’re ready to start innovating new PCB designs, use the full suite of design, layout, and simulation features in Altium Designer®. When you need to share your work with your collaborators, you can use the Altium 365® platform to share and manage your design data. We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.

Altium Designer Free Trial


About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2000+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

Related Resources

Related Technical Documentation

Back to Home
Thank you, you are now subscribed to updates.