Impedance Controlled Routing for Boards Made in Altium Designer

Computing requirements and applications require data to be processed at faster rates than ever before. As communication bands start to fill and newer components hit the market, PCBs will need to operate at higher data rates and frequencies. Networking and data center applications like 100G and faster Ethernet, as well as advanced wireless protocols like 5G and 6G, will continue operating well into the mmWave regime and beyond.

These facts mean signal integrity issues like crosstalk, EMI, ringing, and impedance control are becoming ever more critical in advanced PCB designs. Analysis tools need to be able to identify and provide some insight into compensating signal integrity problems in PCBs during the design phase. No one wants to receive their finished board from a manufacturer only to test it and find that bit error rates are sky-high. This is where simulation tools become critical by allowing you to find the sources of signal integrity problems before your product hits the market.

The design environment in Altium Designer® now includes an advanced 3D field solver that integrates with your Layer Stack Manager for accurate impedance control, parasitic extraction, and propagation delay calculations. If you're not familiar with using impedance formulas in advanced optimization methods, you can determine the trace geometry you need for impedance controlled routing with this integrated design tool. Here's how this works in Altium Designer's rules-driven design workflow and how to make the best use of the integrated 3D field solver utility.

Setting Up Impedance Calculations

Impedance controlled routing in Altium Designer uses an integrated field solver from Simberian. This begins after your schematics are completed but before you lay out your board. You'll want to set up this feature when designing your PCB stackup. After you create a blank PcbDoc file, you can go to the "Design" menu and click "Layer Stack Manager." After you finish creating your stackup, you can start running impedance calculations for different layer pairs. To get the impedance value you need for different layer pairs, you'll need to click on the Impedance tab at the bottom of the Layer Stack Manager window.

Creating Impedance Profiles

From here, you can create single-ended impedance and differential impedance profiles for different layer pairs in your stackup. An impedance profile allows you to set a specified impedance, and the tool will return the trace width that sets the impedance to the desired value. For differential signals, you can create a differential profile and specify the trace spacing between differential pairs, and the impedance profiler will return the trace width you need. You can also adjust the spacing to the value you want, and the impedance profiler will adjust the trace width in response.

Using the impedance profiler tool for a 10-layer PCB in Altium Designer.

Combined Single-Ended and Differential Impedance

Under high-speed differential signaling standards, you'll often need to set the differential impedance to a specific value while also setting the single-ended impedance of each trace in the pair to its own value (Ethernet is one example). To do this, you can create two impedance profiles for the relevant signals: one single-ended profile and another differential profile. This proceeds through the following process:

1. Create a single-ended impedance profile to determine the width required for impedance control in single-ended nets.
2. Create a differential impedance profile and set the desired impedance and tolerance values.
3. Copy the width you determined from the single-ended profile into the differential profile on the same layer.
4. Manually adjust the spacing until the differential impedance reaches the desired value.

The image below shows this type of impedance control, where the differential impedance and single-ended impedance for the differential profile are matched to 85 Ohms and 50 Ohms, respectively.

Defining single-ended and differential impedance controlled routing profiles in Altium Designer.

Now that the relevant impedance profiles have been defined, it's time to enable them as design rules for controlled impedance routing.

Using Design Rules for Impedance Control

Single-Ended Nets

The design rules you define next will specify the width required to maintain your required impedance. To start configuring your design rules, open up the "PCB Rules and Constraints Editor." Click on the "Design" menu and then click the "Rules" option. If you look at the list on the left-hand side of the editor, you'll see an entry for "Routing." Click on the Routing -> Width option. In the image below, the single-ended impedance profile is enabled (the profile named S50), which will force the router to place traces with the width defined in your impedance profile.

Setting up impedance controlled routing in Altium Designer.

There are two important points in this dialog. First, you can choose to apply impedance control to traces in specific signal layers or with specific signal nets. Here, this has been applied to "NetR_BIAS_1," which is a single-ended net (selected near the top of the dialog). Second, you could also apply the impedance profile as a blanket design rule to all nets on all layers by selecting the "All Nets" option. You can also apply this option to a Net Class, which will automatically apply the rule to multiple nets in a single class.

Note that in the table at the bottom of the dialog, you can see which layers are enabled in the impedance profile. Here, the rule will only apply to TopLayer and BottomLayer during routing. To enable other signal layers, go back into the Layer Stack Manager and open the Impedance tab. From here, you can enable other layers where you want to enforce this design rule.

Differential Pairs

To apply the differential impedance profile, go to the Routing -> Differential Pairs Routing option in the PCB Rules and Constraints editor. From here, you can enable the differential impedance profile you configured in the layer stack manager. In this case, when you're using the interactive router for differential pairs, the router will enforce the required trace width and spacing you defined in the impedance profile.

An image from the PCB Rules and Constraints Editor is shown below, where a differential impedance profile has been applied to set the impedance of all pairs in a specific set of differential nets to 90 Ohms. Note that you could also define a Differential Pair Class and set the impedance profile to apply to that class.

For a differential pair, the available layers, Preferred Width, and Preferred Gap are controlled by the selected profile.

Just as the rule can be enforced on specific single-ended nets or Net Classes, differential impedance controlled routing can be enforced on specific differential pairs or Differential Pair Classes, as shown above. You can select the specific nets or classes where this rule will apply at the top of the PCB Rules and Constraints dialog. You can also enable specific layers where the differential impedance control rule will be enforced, just as was done for single-ended nets.

Time to Start Routing

Now that the layer stack is finished and impedance control is enabled through your design rules, you can start routing in the PCB layout. When you're using the interactive router, you'll notice that "[Width From: Rule Preferred]" appears in the status bar at the bottom of the screen as you route. Your traces will appear on your board with a predefined width (and defined spacing for differential pairs).

Impedance control automatically defines your trace width as you route

When using the routing tools on impedance controlled nets (both single-ended and differential), the routing tool will prioritize the width you set in the design rules automatically. There is no need to manually adjust the width. However, if you want to apply a different width, there are several options, such as defining alternate priority constraints by layer or defining room-based constraints for specific nets. This would allow you to change the width constraint in different regions of the PCB, which would be applied automatically by the interactive router.

Finally, impedance controlled routing in your PCB is not accurate unless you run signal integrity simulations to determine the appropriate width for your traces. Some of these aspects can be examined in Altium Designer, while others require an external software application. Some of the important signal integrity metrics you can consider are:

• TDR reflection waveform
• Single-bit response waveform
• S-parameters (S11 and S21)
• Eye diagrams for channels with high serial data rates
• Mode conversion (for differential pairs)

In Altium Designer, it's possible to examine large impedance mismatches at the receiving end of an interconnect by looking at the reflection waveform. This would be the single-bit response waveform mentioned above. This allows the identification of ringing and potential for blowing past the high/low-end of the voltage threshold ranges for the HIGH logic state. Doing this correctly requires accurately describing the interface for your signal pins, which requires knowledge of the pin's logic family or the use of an IBIS model. Some manufacturers make IBIS models available for download and usage in time-domain signal integrity analyzers, such as the Signal Integrity Analysis feature in Altium Designer.

The rules-driven design engine in Altium Designer makes it easy to implement an impedance controlled routing scheme. If you have an existing design that has signal integrity problems, the signal integrity simulator can iterate through possible termination schemes and show you the results, allowing you to select the right scheme to terminate your traces.

Talk to an Altium expert today to learn more about the routing and signal integrity tools in Altium Designer.