A Guide to Mode Conversion, Its Causes, and Solutions

Zachariah Peterson
|  Created: January 20, 2022  |  Updated: September 2, 2024
Mode conversion

Differential pairs are most often discussed in terms of their impedance and length matching tolerance, both with the goal of ensuring proper termination at the receiver and suppression of common mode noise. On interconnects, such as board-to-board connections or cascaded transmission line arrangements, you have an important EMC compliance metric that is sometimes overlooked. This is mode conversion, which can be visualized in an S-parameter measurement for differential and common-mode signal transmission.

The term “mode conversion” is most often discussed in the context of optics, particularly when waves refract as they transmit across the interface between two media, where the wave can change from a true unpolarized (TEM) wave to a partially or fully polarized wave. In electronics design, and particularly in high speed interconnect design, mode conversion must be limited below some value to ensure signals can be read and interpreted at a receiver. In this article, we’ll look at a short overview of mode conversion in high speed design with some examples from common differential standards.

Mode Conversion Overview

The term “mode conversion” refers to the conversion of a differential signal into a common-mode signal. This oversimplifies things a bit; it’s not that all the power contained in a differential signal is converted to common mode. Instead, the converted portion of the signal can be spread across the frequency domain and is observed in a specific type of S-parameter measurement. In essence, the differential signal has lost some of its energy as it was converted into a common-mode signal, thus the differential signal may not be recoverable if too much of the signal is converted into the common mode.

You might be tempted to ask: why should we care about mode conversion and resulting common-mode noise at all? Doesn’t a differential receiver eliminate common-mode noise? There are two responses to this to consider:

  • Common-mode currents lead to common-mode radiated EMI (dipole radiation), which can cause emissions test failures when it is very strong. This would happen during the edge rate, so you would have strong emission during high speed signal transmission over a printed differential pair/connector or a cable.
  • Receivers can suppress most of the common-mode noise they receive, but not all of it, thus common-mode currents should be limited. Again, this is important during the edge rate; the common mode portion of the signal may be much stronger than what the receiver can reliably suppress when mode conversion is high.

Mixed-Mode S-parameters

Mode conversion is described mathematically using mixed-mode S-parameters. These S-parameters mix the S-parameters for the input differential signal and the resulting common-mode noise into a single matrix. Similarly, the same matrix also describes the S-parameters for any input common mode signal (or noise) and the resulting differential mode signal seen at the output. The definition of the mixed-mode S-parameter matrix is:

Mixed-mode S-parameters

Here the "D" refers to differential signal, and the "C" refers to common-mode signal. The numbers in the subscripts have their usual meaning referring to ports 1 and 2 of a differential pair interconnect.

Here we have a matrix with 16 parameters, but not all of these are used in practice. The specific parameters you need can be determined by decoding the parameter naming in the matrix:

Mixed-mode S-parameters

In other words, if you want to determine the amount of common mode noise seen at port 2 of a differential pair when port 1 is given only a differential signal, that amount is equal to the product (SCD21)(a1d). Using these measured S-parameters, it's then possible to determine the amount of common-mode or differential-mode power transferred to a receiver or put onto a cable.

Mode Conversion Limits

How much of this common-mode signal is too much? The answer is that it doesn’t take very much common-mode noise propagating from an I/O to a cable to cause an EMC failure. The specific current is a function of frequency and will depend on the specific standard you’re working with. For example, FCC Class A and Class B products will have different limits than CISPR products; the table below summarizes these limits for FCC Class A and Class B products (credit goes to the late Henry Ott for compiling the data).

Frequency

FCC Class A

FCC Class B

<1.7 MHz*

40 uA

10 uA

1.7 - 30 MHz*

120 uA

10 uA

30 MHz**

24 uA

8 uA

50 MHz**

14 uA

5 uA

100 MHz**

11 uA

3.5 uA

Common-mode current limits on cabling for FCC Class A and Class B produts.
* Based on Conducted Emission Limits
** Based on Radiated Emission Limits

Just for perspective, the currents involved in data transmission over Ethernet or classic LVDS are at mA levels, so we have very low levels of common-mode current that are allowed compared to the differential signal current.

In terms of signaling standard limits, this varies with standard and where the measurement is being taken. Note that signaling standard limits define hardware performance; they do not define emissions limits required to pass EMC testing. For example, in USB 3, the mode conversion limit in mated cable assemblies is -20 dB throughout the specified signal bandwidth, so the entire interconnect could allow a lot of common-mode noise and still function to spec. Note that “functioning to spec” and FCC/CISPR compliance are not necessarily the same thing.

Causes of Mode Conversion

Asymmetry in routing on the PCB or in the wiring used in a cable will cause mode conversion in differential interconnects. Another way to think of this is not that it creates new common-mode noise where there was none, but that the asymmetry delays the arrival of zero crossing towards the edges or creation of a phase delay between the two signals on each trace. As a result, it’s more difficult for the differential receiver to fully suppress common-mode noise throughout the signal bandwidth.

A side effect is that an asymmetry allows coupling of some noise which may only exist on one conductor but not another, or which may not fully couple to both conductors of equal magnitude. Again, the common-mode currents will not fully cancel as they may not truly be in common-mode, so some noise would appear on the received signal.

Asymmetries arise in the following ways:

  • Geometry variations (length or cross-section mismatch)
  • Dielectric constant and propagation constant, such as from the fiber weave
  • Impedance variations, possibly due to the above points or from parasitics
  • Coupled delay segments, such as differential serpentine routing (see the example below)
  • Injection of signal from an unbalanced system (on a PCB) to a balanced system (twisted pair wire)

On the PCB, this is related to routing, material inhomogeneities, or simpler discontinuities like ground plane gaps in loosely coupled differential pairs.

Each of these effects will create mode conversion in different frequency ranges, which can be viewed in S-parameter data. For example, fiber weave and parasitic capacitance contributions will appear at higher frequencies, while geometry variations could create broadband mode conversion. Since this is a frequency domain measurement, we use S-parameters to quantify mode conversion (measured in dB by comparing differential and common-mode signal strength).

Example Mode Conversion Measurement

The following shows a basic example of a mode conversion measurement. For a given channel, we define two types of S-parameters that are used to quantify mode conversion:

  • Differential to common-mode conversion (SCD21): We input a differential-mode test signal and measure the common-mode output signal.
  • Common to differential-mode conversion (SDC21): We input a common-mode test signal and measure the differential-mode output signal.

The example below shows the mode conversion created across the frequency domain by serpentine routing sections used to delay differential pairs in a parallel bus.

PCB mode conversion
Example mode conversion measurements. [Source]

The interpretation using S-parameters makes sense, and it applies to channels on a PCB or a cascaded network that would find using a (PCB + I/O + cable + I/O + PCB) type of interconnect. The methodology also applies to board-to-board connectors, where the connector is playing a similar role as a cable. No matter how the interconnect is structured the important point is this:

Jitter vs. Mode Conversion

Since asymmetry in propagation time and mode conversion are linked, and jitter produces asymmetry, it would be reasonable to ask, can we predict jitter from mode conversion measurements? In fact, you can do exactly that with a simple formula using your S-parameter data. The basic relationship is:

Mode conversion jitter equation
Conversion between mode conversion S-parameters and jitter.

This equation describes the trace-to-trace jitter and it should tell you something important: jitter is a function of the test frequency! The RHS in the above equation is a function of frequency, and notice that the angular frequency appears in the LHS. Simply plug in your S-parameter data at each test frequency and you can calculate the jitter at that specific frequency. Since we’re dealing with differential pairs, we normally quantify T-jitter as a fraction of the unit interval (UI) as this is what you would read from an eye diagram.

As an example, this can be seen in cable measurements, such as in the graph shown below. This graph shows mode conversion measurements in a 28 AWG twinax cable. We can see that the total skew is a function of cable length (as expected), as well as a function of frequency. The frequency component may be unsurprising, until you remember that the phase misalignment due to mode conversion is also a function of frequency, thus we would expect the same for skew.

Skew from mode conversion
Mode conversion up to 2 GHz in 28 AWG twinax cable. [Source: Analog Devices]

The Takeaway: Maintain Symmetry

All of this should illustrate the need for length matching between two sides of a differential pair and symmetry in routing. When I write “symmetry in routing”, I don’t necessarily mean “tight coupling” as is often prescribed in basic high speed PCB design guidelines. Rather I mean the following:

  • The propagation constant for each trace in the pair should be the same throughout the length of the route, regardless of whether the traces are side-by-side the entire distance.
  • The single-ended impedance of each trace should be consistent throughout the length of the route, regardless of whether the traces are side-by-side the entire distance.
  • Any impedance/propagation constant variations (e.g., due to parasitic capacitance) should appear equally on both traces in the pair. Asymmetry in this area is known to be one major contributor to mode conversion.

Regarding the last point, there is a great article I recommend readers look at to see how ground vias can affect mode conversion:

As I’ve mentioned before (as well as other experts), so-called “tight coupling” is not a requirement for differential signal transmission as long as the traces are designed appropriately, although it does bring some benefits from the perspective of noise. It is also the only way to ensure a differential impedance spec is met without a nearby ground plane. Think carefully about how you want to route a differential pair and define its impedance as this will help prevent mode conversion. By far, the easiest way to ensure you meet all these goals is to just bite the bullet and route everything with enforced symmetry and tight coupling. Thankfully, modern CAD tools make this all very easy.

Once you’ve determined your differential pair mode conversion requirements, you can create your differential pair geometry and routing rules using the industry’s best PCB layout features in Altium Designer®. The integrated Layer Stack Manager includes an ultra-accurate field solver for impedance calculations in standard geometries, and you can instantly enforce the results as a design rule in your routing tools. When you’ve finished your design, and you want to release files to your manufacturer, the Altium 365™ platform makes it easy to collaborate and share your projects.

We have only scratched the surface of what’s possible with Altium Designer on Altium 365. Start your free trial of Altium Designer + Altium 365 today.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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