PCB Design Rules for Analog Circuits

Zachariah Peterson
|  Created: March 18, 2019  |  Updated: December 8, 2020

Glowing vacuum tube on a blue background

Some people just don’t understand how electronics engineers see the world. Sometimes, it’s like we’re Neo at the end of The Matrix, looking at everything in digital data. Analog design is like a retreat back to the real world.

Even though building analog systems might seem like going back in time to the days of vacuum tubes, analog signaling is not going away any time soon. Purely analog boards and mixed signal boards are still important in many products, and new designers should take note of some important PCB design rules for analog circuits.

Routing Guidelines for Analog PCBs

Traces in your analog PCB should be made as short as possible for several reasons. First, traces carrying analog signals can exhibit transmission line behavior if the trace is too long, just like a trace carrying a digital signal. This transition is sometimes said to occur if the propagation delay is larger than one-quarter of the oscillation period of the analog signal, although the real transition is not so specific. When determining whether a trace will exhibit transmission line behavior, you need to compare the trace's characteristic impedance with the circuit's input impedance and examine any deviation from the ideal input impedance value seen by your driver. Take a look at this article to see how you can determine the transmission line critical length. In essence, if the trace is short enough, the trace's impedance won't matter, and the (line + receiver) input impedance will appear to simply be the receiver's impedance.

Keeping traces short, especially in higher frequency circuits, will help prevent transmission line effects. Upon transition to transmission line behavior, analog signals can reflect from an impedance mismatch, potentially leading to analog signal resonance in the trace. This forms a standing wave on the transmission line that generates strong crosstalk (EMI) in nearby components.

The use of vias on critical traces should also be minimized. All vias have inherent self-inductance thanks to their geometry. While signal resonance for vias are typically in the GHz range, inductance adds when multiple vias are placed in series, lowering the resonant frequency for the trace in question. Another problem with routing analog traces between layers is that the vias require placing holes in ground planes, creating a high impedance discontinuity that can cause ground loops. Instead, try to place all analog signal traces on a single layer.

Power and Ground Planes

The placement of power and ground planes on your multilayer board is critical to ensuring signal integrity. The ground and power planes typically overlap and are decoupled with a capacitor in a digital board. In contrast, the analog power and ground planes should not overlap.

In mixed signal boards, you’ll need to adopt a combination of digital and analog rules. The digital block and the analog block should be separated by splitting the ground plane. This ensures that all signals are referenced to the same ground. The join between the digital and analog ground planes should be placed as close as possible to the ground connection for the power supply.

The digital and analog power planes should also not overlap. If these two planes do overlap, the two planes will have some capacitance between the overlapping areas. This is likely to cause RF emissions that propagate between these two planes.

If you are using a PLL for frequency synthesis with an analog signal to form a reference oscillator or a clock pulse train, you’ll need to very carefully route the clock output back into the digital section. This can be very tricky and depends on whether you are using a PLL IC or if you intend to design your own from separate components.

In the digital section of the board, it may be a good idea to define one or more signal layers between the digital power and ground planes. This gives you a place to route some signals that need to be protected from EMI; the two large sections of conductor will block EMI. Be sure to avoid excessive use of vias to pass between these inner signal layers as vias can easily couple noise back into the power plane, and vice versa.

Once digital traces are routed over the digital ground plane, either on the surface or the interior, this helps ensure that your return signal is only induced in the ground plane and travels to the ground connection on the power supply. The ground plane will suppress any signal from being induced in the power plane. For sensitive signal traces routed between the power and ground planes, the decoupling capacitor can compensate any digital signal induced in the power plane.

Computer motherboard with digital and analog connections

Through-hole vs. Surface Mount Components

Through-hole components are normally used on boards where space is not an issue. If real estate on your board is limited, it is better to use surface mount components. Through-hole components can also have higher power ratings than surface mount components.

If you must use through-hole mounted passive components, avoid mounting them vertically if possible, especially in high speed boards. If you can use shorter leads and stretch them horizontally, the area enclosed by your circuit will be smaller, minimizing self inductance. This will also help minimize EMI into other components, especially in high frequency circuits.

A cleaner alternative, both from a signal integrity standpoint as well as aesthetically, is to use surface mounted passive components. Although through-hole components are cheaper, fabricating a board to support through-hole components can be more expensive due to the extra drilling steps required.

Dealing with Unused Op-amps

One component that is bound to appear in an analog board is an operational amplifier. In many op-amp ICs, some of the op-amps will be left unused. Any unused leads on the IC should be terminated properly. Unterminated leads on op-amps in an IC can produce noise that propagates into the operating ICs, degrading signal integrity.

If you are using a single power supply rail, you should first short the output back to the inverting input. This creates negative feedback and ensures that the output will properly follow the input. Next, connect a voltage divider with equal resistors to the non-inverting input and the ground pin. This will set the input potential to the midpoint of the linear range. If you are using a split rail, you can simply short the output to the inverting input and ground the non-inverting input.

Surface mount IC in tweezers over a blue PCB

Building devices that act as wireless beacons, are used to control and gather data from sensor networks, or that interface with external analog systems require design software with signal integrity tools, a powerful PDN Analyzer, and an intuitive layer stackup manager. Altium Designer® contains all of these features and many more in a unified, rules-driven design platform.

If you’re interested in learning more about Altium, you can download a free trial and get access to the industry’s best layout, routing, and simulation features. Talk to an Altium expert today to learn more.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.

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