Zero Voltage Switching in DC/DC Converters

Created: August 6, 2025
Updated: August 12, 2025
Zero Voltage Switching in DC/DC Converters

Hard switching in MOSFETs, particularly in DC/DC converters, is one factor that reduces system lifetime and creates excess losses which reduce power conversion efficiency. In regulators with low input current, this may not present a reliability problem, but it becomes a larger factor in many of today’s switching regulator topologies, which are operating at lower voltages and higher currents. Hard switching at high frequencies in these designs also makes EMC more challenging by increasing radiated emissions at higher frequencies.

This is why many highly integrated switching regulators implement zero voltage switching (ZVS), where switching elements are switched ON when the voltage across them is zero. Some gate drivers are also available with this capability for use in particular topologies. Once devices scale to higher powers and larger numbers of MOSFETs, a discrete gate driver is often needed to toggle ON the MOSFETs fast enough.

This article will look at how to implement ZVS in higher power regulators where fast response and small footprint are necessities.

How Zero Voltage Switching is Used in DC/DC Converters

ZVS in switching regulators is a soft-switching technique where the power switches (the MOSFETs in a switching regulator) turn on when the voltages across them are close to 0 V. For example, in synchronous buck converters with N-channel MOSFETs, the voltage being referenced is the drain-source voltage (Vds) across the high-side and low-side MOSFETs. This eliminates the large current spike that would otherwise occur when switching on with a high voltage across the MOSFET drain and source terminals.

High-power, low-noise regulator, particularly multi-phase regulators operating at low logic voltages or designed for RF power supplies, implement the approach for multiple reasons:

  • Driving the gates ON at the moment when Vds = 0 V limits inrush current
  • Driving the gates at 0 V dramatically reduces switching losses
  • Reducing inrush also reduces strong bursts in the magnetic field which would be seen as radiated or conducted EMI at harmonics of the switching frequency
  • By reducing turn-on losses and inrush, component lifetimes will be longer
  • Reducing switching losses at high frequencies increases overall power conversion efficiency

Topologies where this is implemented include resonant/quasi-resonant converters, multi-phase converters (buck, boost, or buck-boost), and bridge topologies.

In principle, there are two requirements to implement ZVS. These are:

  • Allowing the gate driver to measure the voltage directly and begin switching, i.e., as part of an internal control loop
  • Taking advantage of the energy stored in parasitic or external capacitances which force the MOSFET Vds to 0 V via resonant oscillation

The image below shows an example with voltages marked at high-side and low-side MOSFETs in a synchronous buck converter.

In this simple circuit, ZVS is implemented by toggling the high-side and low-side MOSFET gates when V(ds) = 0. The V(off) voltages are the V(ds) values across the MOSFETs when each MOSFET is switched OFF. Once the off-state V(ds) values are 0 V, the gate driver circuit can switch the MOSFETs to the ON state.

In these designs, the gate drive must perform several tasks, including sensing the various voltages, implement stable internal reference voltages for comparison, and generating the necessary PWM signals to drive the MOSFET gates. The gate drive circuit could apply some dead time in some topologies, such as in a push-pull DC/DC converter topology, in order to reduce shoot-through, which will extend the range of available duty cycle values to higher values.

What Drives the MOSFETs to a 0 V Condition?

The MOSFETs in a switching converter are driven to zero by parasitic inductance and the MOSFET output capacitance values (Coss), which create a resonant circuit with which switching events can be carefully timed. If the energy stored in the inductor or transformer can fully discharge Coss within the circuit’s dead-time, then you have achieved ZVS, no discrete resonant LC circuit is required.

For example, hard-switched topologies can implement ZVS by leveraging parasitic inductance and capacitance, while isolated topologies can use the energy stored in the leakage inductance of the transformer, which discharges the Coss of the MOSFETs. In another example, resonant converters (e.g., LLC resonant) can achieve ZVS quite easily as they already implement a resonant condition in their switching stage.

The interactive graphic below shows how this process works in a full-bridge topology.

Phase-Shifted Full Bridge ZVS Process

Q1
Q2
Q3
Q4
 
Coss1
 
 
Coss2
 
 
Coss3
 
 
Coss4
 
0V
Vin
0V
Vin

Step 1: Initial State

MOSFETs Q1 and Q4 are ON (diagonal pair conducting)

Current flow: Vin → Q1 → Transformer Primary → Q4 → GND

Voltages:
• Q1 drain: ~0V
• Q2 drain: Vin
• Q3 drain: ~0V
• Q4 drain: Vin

Energy storage: Leakage inductance has stored energy: ½LlkI²

Gate Drive Timing

Q1 Gate:
 
Q2 Gate:
 
Q2 Vds:
 

 

Zero Voltage Switching Implementation

A simple ZVS circuit can be implemented with a fast pulse generator, a delay timer, and analog comparators. The goal is to switch a gate ON or OFF sufficiently fast in response to the measured voltages reaching 0 V. This requires a fast comparator and fast logic, which would typically be implemented with a small microcontroller and discrete comparators.

One approach for implementing a compact gate drive system with ZVS is to use a mixed-signal processor. These components can use built-in comparators to monitor voltage and current, as well as implement logical conditions on these values for fault detection, which offers the capability with a small number of components.

For physically larger MOSFETs (or parallel arrays) which would be used with higher-power DC/DC converters, the pulse driver in this simple ZVS topology will need to source more current to toggle ON the MOSFETs with a short rise time. This may require a smaller MOSFET as an uncontrolled current source, possibly with a current limiting resistor to control the larger MOSFET rise time. Additional circuitry that is often required includes snubbers/RCD clamps to overcome ringing from parasitic inductance along the output current path.

The industry’s best component for implementing mixed-signal processing in ZVS is Renesas GreenPAK. These programmable mixed-signal processors enable smaller, more efficient systems in advanced power electronics applications like ZVS. To learn more, take a look at the GreenPAK components and reference examples.

Whether you need to build reliable power electronics or advanced digital systems, use the complete set of PCB design features and world-class CAD tools offered by Altium to implement your GreenPAK solutions. Altium provides the world’s premier electronic product development platform, complete with the industry’s best PCB design tools and cross-disciplinary collaboration features for advanced design teams. Contact an expert at Altium today

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