High Voltage SMPS PCB Layout to Minimize Heat and Noise
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Whether you are performing AC-DC conversion or DC-DC conversion, switching power supply layouts are common in high voltage design and must be constructed carefully. Although this system is quite common, it will easily radiate EMI due to the fast changes in voltage and current during switching. Designers can rarely adapt existing designs into new systems as a minor change in one area can create an EMI problem that is difficult to diagnose.
With the right layout choices and routing, you can prevent noise from becoming a significant problem on the output from your SMPS. Low voltage converters can be purchased as ICs with different form factors, but high voltage converters will need to be produced from discrete components on a dedicated board. Here are some important SMPS PCB layout tips to help you keep components cool and prevent noise problems in your system.
There is no getting around it: any SMPS will produce moderately high frequency noise due to the switching action of the transistor driver. In effect, you are trading low frequency ripple (i.e., from a full-wave rectifier during AC-DC conversion) into high frequency switching noise. While this conversion produces more stable DC output, there is still the matter of two important noise sources:
- Direct switching noise from the switching element.
- Transient noise elsewhere in the system.
Noise can appear on the output from an SMPS unit as conducted noise and as radiated noise. Although the cause of each issue can be complicated to diagnose, it can be easy to distinguish between the two types of noise. The other design challenges in SMPS PCB layout is heat generated in the board. While this can be influenced by choosing the right PWM frequency, duty cycle, and rise time, you’ll still need to use the right thermal management strategies in your board. With these two challenges in mind, let’s look at some of the finer points to pay attention to in your SMPS PCB layout.
An ideal SMPS will dissipate zero power, although this does not happen in reality. Your switching transistor (and input transformer for AC-DC conversion) will dissipate the lion’s share of power as heat. Even though efficiency can top 90% in switching supply topologies, power MOSFETs can still dissipate significant heat during switching. The common practice here is to place heatsinks on the critical switching components; be sure to connect these back to your ground plane to prevent a new source of EMI.
In high voltage/high current power supplies, these heatsinks can be quite large. You can give your system an extra boost of cooling by mounting a fan to the enclosure. Again, make sure to follow best practices regarding powering this fan to prevent new EMI problems.
Your layout will help somewhat with thermal management, but it is a greater determinant of EMI susceptibility. Conducted noise is normally dealt with by using EMI filter circuits on the input and output circuits. Like many EMI problems in high speed/high frequency systems, your stackup will be the major determinant of immunity to radiated EMI.
The relevant frequencies at which the SMPS will run are anywhere from ~10 kHz to ~1 MHz, so radiated EMI will induce noise inductively. Therefore, you want to place the ground plane in your stackup directly under the surface layer with all your power components. This will ensure low loop inductance for circuits on the surface layer. Any induced noise signal that propagates to the output will typically be removed through filtration at the output.
There is some objection to putting ground beneath or near coils (inductor, transformer, or common-mode choke) in your PCB layout. The reason is that the winding capacitance in a coil can couple current from a ground plane back into the coil, creating common-mode noise that is a source of EMI. It's very important to track return paths in your layout to prevent common-mode noise coupling, a task which is aided with the right field solver utility.
Transients are a more difficult problem to solve as they are related to your stackup, routing, presence of vias, and insufficient decoupling/excessive impedance. Just as is the case in high speed design, don’t route any copper carrying a switching signal over a gap in the ground plane, as this will create some type of antenna structure that can radiate strongly at transients. These transients tend to be high frequency (anywhere from 10’s to 100’s of MHz).
The issue with transient ringing is an impedance management problem. High impedance leads to strong voltage ripple. Components should be placed with the right land patterns to minimize impedance in the board PDN. Examples of good and bad lands for your components are shown below.
Finally, it’s best not to leave any isolated islands in your layout. Connect any power islands that might contain control circuits or passives back to the ground pour/ground plane with decoupling capacitors. Be careful with any via placement in these situations as you do not want to create an unintended notch or slot in your ground plane.
More on High Voltage SMPS Design
If you’re interested in a moderate voltage driver circuit for powering high-intensity LEDs, take a look at this article from Mark Harris. There is also the matter of determining the best switching frequency to use in your SMPS. This can be a difficult optimization problem to solve, but you can get much closer if you understand the switching behavior of your MOSFET when driven with a PWM signal. I’ve discussed this point in a recent article. Finally, take a look at our advice on designing high voltage boards (including an SMPS) to IPC standards.
The schematic design and layout features in Altium Designer® are ideal for creating an SMPS PCB layout and simulating its behavior. You’ll have access to a full suite of pre-layout simulation tools to use for circuit design, and you’ll have a powerful PDN analyzer to ensure stable power distribution in your board. All these features are accessible in a single design environment, which helps you remain productive and get your next product built quickly.