The Top 6 DFM Problems That Affect Every PCB Design
As a PCB you have to manage a variety of different requirements and expectations. There are electrical, functional, and mechanical aspects to consider. In addition, the PCB layout has to be produced in a timely manner, with the best possible quality, at the lowest possible cost. And through all of these requirements, you also need to factor in DFM (Design for Manufacturability). It’s a big part of the PCB design process, and one which can frequently cause problems if not done properly. Let’s look at the 3 DFM issues in PCB Designs.
Common DFM Problems in Your PCB Layout
It's easy to find security in your CAD tools, but your CAD tools may allow you to create DFM problems that may not be easily solved. Even though your board passes all electrical rule checks and is electrically correct, it may not be manufacturable. Why does this occur? Shouldn't your PCB design tools help you create a circuit board layout that is electrically function and manufacturable at high volume?
Your PCB layout can get very complicated and can hide many DFM issues if you don't know what to watch for. Some of these DFM problems create problems with assembly, electrical testing, or fabrication, but all of these can be overcome if you know more about the manufacturing process. To learn more about the manufacturing process in general, take a look at this article on the Altium PCB Design Blog. If you're ready to learn more about what your manufacturer looks for during a design review, here are some of the most common DFM problems they will try to spot in any PCB layout:
- Uneven SMD Pad Connections
- Incorrect Solder Mask Opening on SMD Pads
- Open Vias in SMD Pads
- Acid Traps
- Common Reliability Standards Violations
Preventing these problems means relying on your design rules in your PCB layout tools, which can help ensure your board can be put into fabrication with minimal design review time.
Uneven SMD Pad Connections
Small SMD components, such 0402, 0201, etc., need to have a uniform connection to help prevent tombstoning during reflow soldering. The same applies to BGA pads in order to ensure reliable soldering. This is simply a matter of placing the correct pad size on your component footprint. Common components have defined pad sizes (e.g., pads on ICs under the IPC-7351 standards) that should be placed in your footprints.
Your manufacturer won't always look at your design files to inspect this. Instead, they'll probably look at your Gerber files and netlist, and they might compare footprints against component sizes in your bill of materials. Depending on the level of non-recurring engineering services you request, your manufacturer may not catch this particular recommendation until it is too late. After fabrication, the test procedure to ensure an even connection to the pad involves X-ray inspection. Before you send your design off for fabrication, you should check any footprints you design to ensure they are correct for the component lead size.
Incorrect Solder Mask Opening on SMD Pads
Solder mask opening (also called solder mask expansion or solder mask aperture) are one way to keep solder trapped on the target pad during hand or wave soldering. During soldering, a solder ball forms on the target pad, but a large solder ball can collapse and flow around the pad at high temperature. Placing a small solder mask opening around the pad will hold the solder ball in place during soldering, even if the deposited solder ball is slightly large. A similar technique is used in dog-bone fanout for a BGA, where a small amount of solder mask block the pad from the via (called a solder dam).
This problem is solved when you create footprints for your components, which will have a defined solder mask opening around the pad. Generally, a solder mask opening will extend ~4 to 5 mils beyond the edge of the pad. If the solder mask aperture is too large, it won't prevent solder ball flow and bridging during wave soldering.
Open Vias in SMD Pads
It’s a commonly shared bit of PCB design wisdom that you should avoid via-in-pad at all costs. If a through-hole via is placed in a pad too close to the soldering region, the hole could allow solder to wick through to the back of the board. If the via connects directly to a large plane in an internal layer, heat will dissipate into the plane. This could create a cold joint or cause tombstoning during wave soldering.
Via-in-pad does have a place in PCB design, particularly in HDI designs with very fine pitch BGAs. In other situations, where a minimized path to ground is desired, use a short trace with solder mask or plated-over vias. To prevent excessive heat dissipation into a plane layer during soldering, place a thermal relief via on the connection to the plane.
So far, we've discussed 3 common pad and via DFM issues. Read more about these DFM problems in these articles:
- Avoid Common Pad and Via Problems in Your Last-Minute DFM Check
- Common SMT Process Defects to Avoid During Soldering
The process of creating a copper image on an individual board layer is dependant on many factors. Copper is removed from a laminate material using an alkali etchant solution, which basically reacts with copper and slowly dissolves it. Copper features in your PCB with tight corners can allow a viscous etchant to get trapped, known as an acid trap, which over-etches the nearby copper. This leads to excessive copper roughness at the acid trap location.
Note that this problem of acid traps has been solved somewhat through the use of low viscosity etching solutions. If you plan to route at 90 degree angles or other obtuse angles, be sure to check what type of etchant the manufacturer uses and whether it causes acid traps.
Maintaining appropriate clearances is a basic aspect of PCB design, but your routing tools will allow you to define just about any clearance if you do not set the correct design rules. Traces need to be kept spaced from pads, other traces, and copper pour to allow complete etching and to make room for fabrication tolerances.
The other reason to maintain appropriate clearances arises in high voltage design. Under the IPC 2221 standards, the minimum clearance between a trace and any other conductor depends on the average potential difference between these conductive elements. The goal here is to prevent unintended ESD, conductive anodic filamentation for closely-spaced conductors, and electrochemical corrosion.
Common Reliability Standards Violations
There is a long list of IPC standards that are intended to ensure reliability. These standards cover everything from via annular ring sizes to aspect ratios, and everything in between. Some common reliability standards outlined by IPC relate to:
- Teardrops on pads and vias
- Annular ring sizes
- Via/microvia sizes and aspect ratios
- Land patterns
- Trace width vs. current and temperature rise
Manufacturers may look in your Gerbers or design files, as well as in your testing requirements, to determine which standards you may have unintentionally violated. Remember that IPC standards are voluntary (except in highly regulated industries), but you should still design to these standards as they have proven themselves to form a baseline for PCB reliability.
Spot DFM Problems with Rules-Driven PCB Design Software
The DFM problems described above are a small list the potential mishaps that can happens in your manufacturing process. By managing the requirements from your manufacturer as PCB design rules, you can ensure your board will be created right the first time and will be reliable. The rules-driven design environment in Altium Designer was created to help you comply with important electrical design rules and common DFM requirements.
Altium Designer on Altium 365 delivers an unprecedented amount of integration to the electronics industry until now relegated to the world of software development, allowing designers to work from home and reach unprecedented levels of efficiency.
We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.
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