Crosstalk in Mixed-Signal PCB Traces and Ground Planes

Zachariah Peterson
|  Created: August 10, 2018  |  Updated: March 13, 2024
Crosstalk in Mixed-Signal PCB Traces and Ground Planes

Digital and analog elements, if not properly arranged, mix about as well as oil and water. When most designers enter the world of PCB design and start transforming their great ideas into hardware, they tend to approach from one of two directions: totally digital or totally analog. Eventually, they hit a point where they have to put analog stuff and digital stuff on the same PCB, and this is where it starts going wrong.

The biggest thing that designers start to worry about when mixing analog and digital signals on the same board is crosstalk. The result is that they will do just about anything to try and suppress that crosstalk, even if it can be shown that the crosstalk will not matter or that such measures will create more serious problems. There are some relatively simple design strategies, as well as some sophisticated approaches in different types of systems, to suppress crosstalk between analog and digital elements in your PCB.

Crosstalk Revisited

Analog signals can induce crosstalk into digital nets, and digital signals can induce crosstalk into analog nets. Crosstalk certainly goes both ways. When you see many mixed-signal guidelines referencing the crosstalk, they normally refer to digital-to-analog crosstalk as the main concern. There are some important reasons for this.

If you look at the typical logic levels LOW/HIGH logic state thresholds in digital ICs, you'll find that they tend to be quite large compared to the typical crosstalk you would expect from analog signals. For example, take a look at the threshold voltages required to toggle logic states for the LVCMOS digital buffers in an MSP430 MCU.

Logic high threshold MSP430
Voltage thresholds for positive and negative transitions required to toggle logic states. Source: MSP430FR2476 datasheet.

At the typical 3 V supply voltage value, we see that 3.3 V logic would have ~1 V worth of margin at full strength. The hysteresis between HIGH and LOW states of 600 mV is also quite large. In typical cases, we might expect 10-100 mV crosstalk for the fastest interfaces with tight trace spacing and large distances to ground. If you follow some basic guidelines (see below), the typical crosstalk you would expect from fast GPIOs interfaces would be under 100 mV. Only very fast interfaces at low logic levels (down to 1.2 or 0.8 V) traveling electrically long distances would have excessive loss to the point where low crosstalk will create errors in a digital interface.

With analog signals, there is no "threshold" that defines a logic state; the signal being used in the device is continuous. In the case where a signal level is very large (many V), then small crosstalk values on the order of ~100 mV or less may be negligible. Signals in these systems could also be cleaned up with filtering. When you get to analog signals near logic levels (~5 V or less), small crosstalk into analog nets could be a problem.

In particular, a few areas where analog crosstalk is challenging are:

  • Direct time-domain measurements of a waveform (more difficult at lower SNR)
  • Real-time measurements where averaging cannot be applied
  • Use of an analog signal for modulation/demodulation
  • Use of an analog signal as a reference oscillator

Is Crosstalk Going to Be a Problem?

Before you start considering whether you need to start adding shielding, isolation, or extreme separation between regions in a mixed-signal system, ask youself a few important questions:

  • How much crosstalk would you expect into an analog net?
  • Will the expected level of crosstalk into an analog net be a problem?

The same questions should be asked looking from the analog to the digital net. The reality is that for most digital signals, the noise margin on the interface will be large enough that aggressor analog signals will not be a major problem. The reverse is not always true.

Consider precision measurement situation, where we want to measure a 0-5 V analog signal that is being read into a 12-bit ADC (we can do the same calculation for an ADC). There is a nearby digital line that induces 30 mV of crosstalk into the analog net. Will this level of crosstalk be excessive? We can compare this 30 mV with the quantization in the ADC interface. If we ignore bandwidth limiting on the ADC input for a moment, we would expect the following level of error:

Crosstalk error calculation

From here we can see that we would get about 24.6 logic levels, or about 4.6 bits of inaccuracy just from the 30 mV induced crosstalk in the analog line. Is this too much error? That depends... the quantization level is 1.22 mV; if you are trying to measure voltage changes down to that small of a level, then this error is very large. For other applications, this error could be smeared with averaging, or by using a lower resolution ADC.

If you are trying to measure a much lower signal level, such as 0-1 V, with an 8-bit ADC, what happens now? We would get the following error with the same crosstalk signal:

Crosstalk error calculation

This 3.91 mV quantization limit with 30 mV peak crosstalk amounts to 7.67 logic levels, or just 2.94 bits of error. This should show that setting up your interface to accommodate your signal level is just as important as knowing the expected noise from crosstalk. Once again, if this is too much error for your system, then you need to take some basic steps to reduce crosstalk into the analog interface.

Isolated Regions?

To overcome this challenge with small crosstalk levels in analog nets possibly being problematic in analog interfaces, I see so many new designers suddenly think they need some kind of isolation strategy to prevent digital and analog nets from interfering with each other. This inevitably devolves into connecting digital components to a digital plane, analog components to a separate analog plane, and then they think they can route anywhere.

When digital and analog ground planes are separated, a problem arises when you need to route between the digital and analog section. For example, you might need to route an analog signal to an ADC that sits in the digital section. You will inevitably have to route over an area that is not covered by either ground plane. Split ground planes will also act as slot antennas and radiate.

Instead, you should implement isolation through routing or only with isolated components, as illustrated in the dual ADC module example below. This example was designed on a 4-layer PCB so that we can provide maximum noise suppression throughout the design, as well as to allow routing of some digital signals on the back side of the board.

Isolated ADC crosstalk
4-layer PCB example with two ADCs: an isolated ADC and a standard ADC. The ADCs form the dividing lines between analog and digital interfaces. By routing different types of signals only on opposite sides of the interfaces, we expect very low crosstalk.

The isolated island area is home to an isolated ADC, which allows a low-level analog signal to be galvanically isolated from all other signals. The digital interface is output on the digital side, along with the non-isolated ADC. Furthermore, the option to route digital signals on the back side naturally isolates them from both analog interfaces. These are very simple design choices that extend to a huge range of systems, and these enable isolation of analog and digital signals without splitting analog and digital grounds into different regions.

If you must apply an isolated ADC, either for galvanic isolation or for noise control, then you should implement the grounding and routing strategy shown in the above images. We have a purely digital area and purely analog area in the design, but we place both over a uniform ground plane; there is no splitting of grounds in the design. For the isolated interface, we have that interface straddling the ground plane so as to ensure we always have galvanic isolation.

 

The Simplest Approach

There is a very basic approach that is not universally practical for every mixed-signal PCB, but it is a very good starting point for starting most mixed-signal designs. The basic approach focuses on preventing analog and digital signals from interfering with each other in the first place:

  • Always route your signals over uniform ground regions; never split planes unless galvanic isolation is required
  • Place analog components in one region over ground, and place digital components everywhere else
  • Locate precision voltage references for ADC/DAC chips near their interfaces with filtering
  • Ground your ADC/DAC components correctly with a single ground net
  • Use the back-side layer or internal layers for digital routing to ensure isolation
  • Select your ADC resolution to exclude noise

This approach will work for most designs that don't have very low-SNR/low-frequency analog signals. It is certainly a starting point for many advanced mixed-signal designs, such as modern digital systems with an RF section. Radar is one area that I frequently cite, which is where you will see this exact set of guidelines used as the starting point for the PCB layout. In the case where you have audio frequencies, very low-SNR analog signals, other strategies involving isolation, filtering, and differential amplification may be needed to keep noise away from your analog signals.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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