Relative Length Tuning With xSignals

Zachariah Peterson
|  Created: September 2, 2022  |  Updated: November 26, 2023
Length Tuning

High-speed interfaces are commonly constructed as serial buses routed as differential pairs, or as parallel buses that operate at high clock rates. These buses require the traces in the be bus have matched lengths so that the group of signals can arrive at a receiving component within a required clocking window. This length matching is constrained by the length of the clocking signal and the rise time of the signals traveling on the bus.

For example, in a DDR3/4 memory interface: each of the eight bits of data has an associated data strobe, as well as a differential clock. Because the data is captured off the strobe, the data bits associated with the strobe must be length-matched closely to their strobe bit. In other protocols, such as CSI-2, there are multiple differential pairs routed in parallel that connect to a camera interface. These differential pairs must have traces matched within each pair, and the pairs must be matched to each other.

Length tuning tools in your PCB design software can help you place and adjust these structures very easily. Altium Designer includes these tools and they can be used to easily adjust net lengths in based on timing mismatch tolerances or length mismatch tolerances. The xSignals tool can also be used to create special design rules for specific high-speed interfaces and implement best practices for serial and parallel interfaces.

Length Tuning Tools

Altium Designer has two tools for applying length tuning sections in a PCB layout:

 - Interactive Length Tuning – for single tracks;

 - Interactive Diff Pair Length Tuning – for differential pairs.

There are 3 patterns available for length tuning: Accordion, Trombone, and Sawtooth.

Using xSignals For Length Tuning

Before you start length tuning, you must create special net classes. After that, they can be used in the length tuning rules. Both net classes and xSignals classes can be used for length tuning. But if we want to apply Relative tuning, only the xSignals classes must be used. You can create them manually or use a special wizard.

Nets

xSignals

xSignals Multi-Chip Wizard

The Wizard can be used to automatically create xSignals, xSignal classes, and Matched Length rules for a number of different common interface and memory circuits.

Length Tuning Rules

If you use the xSignals Multi-Chip Wizard, Matched Lengths rules will be created in addition to xSignals and xSignals classes.

Using the Length Tuning Tool

After setting up the Matched Lengths rules, it is convenient to use the PCB panel to view the range of net lengths in the selected xSignals class.

Launch the Interactive Length Tuning  tool and click on a track you want to extend.

The image above shows length tuning using distance as a constraint, but it is also possible to perform tuning by using delay mismatch as a constraint. It is quite common to use the rise time for a signal to set the delay mismatch constraint in the PCB Rules and Constraints Editor, although this requires knowing the signal's rise time before setting up the design rules. Once set as a design rule for your signals, the length tuning tool will display time units instead of length units.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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