Should You Use Your Power Plane as a Return Path?
If only tracing the return path in a power plane were this easy...
Power planes and ground planes are important for more than just distribution of supply and return power. When defining reference planes, both with impedance controlled routing and in managing return paths, your stackup might force return currents to pass into a power plane before being coupled back to a ground layer. Let’s take a look at some good practices for controlling return paths in your PCB with a power plane as a return path.
Signal Behavior with a Power Plane as a Return Path
Unless you want to have problems with EMI susceptibility, transient ringing, and consistent impedance, you’ll need to carefully manage the distance to your reference plane. If you can choose between using a power plane or ground plane as the return path or the signal reference, you should always choose the ground plane. There are two reasons for this, which I’ll explain in more detail below.
First, even if the return current passes into the power plane, it will eventually need to get to ground. Second, unwanted interference and switching noise can be coupled between a power plane and a nearby signal layer when you have a signal-power-signal-ground layer arrangement. A slightly better arrangement is to use signal-power-ground-signal within your layer stack. The power layer will still be used as a return plane, but the return path can still move back to ground as a displacement current.
The situation where a power plane or power rails are used as a return path should generally be avoided in higher speed boards with dense component layout and routing. This is especially true for sensitive power rails, such as those used to power analog transceivers, PLL, pulse driver circuits, or other components that are especially sensitive to jitter and other noise problems.
Preferred Stackup with Multiple Power Planes
Although you can use the power plane as an impedance reference and return path for signals, you’ll need to place a nearby ground plane to prevent coupling between layers in the type of layer stack shown below. The top signal layers are coupled to the power plane (in blue) and the bottom signal layers are coupled to the ground plane (in red).
Type of layer stack can allow noise to couple from signal layer 1 to signal layer 3.
This layer arrangement is not ideal since you have two adjacent signal layers, which may facilitate crosstalk. It also allows switching noise from signal layer 1 (surface layer) to capacitively couple into signal layer 3. A better arrangement would be to use an 8 layer board instead, with two a ground plane below the surface layer, and another between the interior signal layers.
Normally, the parasitic capacitance between the neighboring layers can be quite small due to the small dimensions of signal traces, creating a somewhat high impedance return path between any return current in the power plane and the ground plane. The normal way to provide a low impedance return path between any return current in the power plane and the ground plane is to place a decoupling/bypass capacitor between the power/ground planes. When working with higher frequency signals, the path through the bypass capacitor will have lower impedance than the path between the power plane, signal layers 3 and 4, and eventually the ground plane. The bypass capacitor you use should be sized to have a self-resonance frequency that is above the edge of the relevant bandwidth in your board.
One practice in systems that require complex power distribution or that use components running at different levels is to use two or more power planes. An example is a board that uses 5 V active components with a 3.3 V MCU/FPGA/ASIC or similar components. Two regulators would be used to supply power through each of the power planes, and each of these planes would need to be referenced to one or more ground planes. Your layer arrangement in your stackup is critical for preventing switching noise from passing between signal layers.
When multiple power planes are used with high speed devices, it is better to increase the layer count and assign each power plane its own ground plane. This is especially important when working with mixed signal boards as it becomes easier to provide shielding between different signal layers, strong coupling between power/ground planes, and a reliable return path in ground layers. FPGA manufacturers may recommend using the following arrangement for adjacent power and ground planes with different signal levels or mixed signal boards.
Example stackup for multiple power planes.
This allows the return path to be sent directly to the ground plane, rather than allowing it to couple through a power plane and into a nearby signal layer. This prevents unwanted interference between signals.
The Takeaway: Engineer Your Return Path
Whether you allow signals to couple back to the power plane followed by a ground plane, or back to the ground plane directly, you’ll need to carefully engineer your return path to prevent undesired coupling between any return signal. The important point here is that any circuit in your board is complete when it connects back to the ground plane, regardless of whether this coupling is direct, through decoupling/bypass capacitors, or thanks to interplane capacitance.
While you can technically take advantage of a power plane as a shielding layer and a reference plane (assuming the potential difference between the signal track and the power plane is not 0 V), it becomes difficult to control the return path in general. This is particularly true with high-speed/high-frequency boards. In more advanced designs that run at low signal levels, you might be using differential pairs, in which case the return path is provided by differential driving, i.e., it flows parallel to the HIGH signal trace. If you’re interested in learning more about tracing the return path in your board, take a look at this article from Francesco Poderico.
The newest PCB layout and routing tools in Altium Designer® include a ground return path tool that interfaces with the DRC engine. This allows you to define limits on the deviation between a trace and its nearest reference plane as a design rule. This rule is checked automatically by the interactive routing tools as you create your board. You’ll also have a complete set of tools for analyzing signal integrity and preparing manufacturer deliverables.