The Need To Control Routing Impedance

David Marrakchi
|  Created: January 27, 2019  |  Updated: April 17, 2020

Engineer is testing electronic devices


The design approach of controlled impedance routing is a key ingredient of high speed PCB design, in which effective methods and tools must be adopted to ensure the intended high speed performance for your PCBs. So unless you carefully design your routes within your PCB, the impedance would be uncontrolled, and its value would vary from point to point throughout the trace. And because your PCB traces don’t act like simple connections at high frequencies, ensuring the impedance is controlled will preserve the integrity of the signals and also reduce the potential of electromagnetic radiation.

What Determines Controlled Impedance?

Typically, a PCB’s impedance is determined by its resistance, conductance, inductive and capacitive reactance. However, these factors are a function of the board structure, the properties of the conductive and dielectric materials, the structure and dimensions of the conductors and their separation from signal return planes, as well as the signal properties. So the trace impedance value is determined from the PCB structure and generated by these factors:

  • Thickness of the dielectric material (core/prepreg )
  • Dielectric constant of the material (core/prepreg, Solder Mask or Air)
  • Trace width and thickness

Typical Configurations

When considering a multilayer PCB, designers need to remember that their trace controlled impedances are shielded by planes (references), and therefore only the dielectric thicknesses between the planes on either side of the trace are ought to be considered. Here are some examples of the most common configurations:

( Er = Dielectric constant of the material

H = the height of the dielectric material

T = Trace thickness

W1,W2 = Trace width(s)

Etch Factor = T / [(W1 - W2) / 2]

S = Diff pair spacing

C = Coating Thickness

CEr = Coating Dielectric constant )   


Surface Microstrip: contains a trace on the surface exposed to air with a dielectric and a plane on one side only.




Coated Microstrip: contains a trace on the surface coated with solder mask,
and with a dielectric and a plane on one side only.




Offset Stripeline: contains a sandwichedtrace within the PCB with a plane on both
sides of the dielectrics (core/prepreg).




Edge-Coupled Surface Microstrip: is a differential configuration with two controlled impedance traces on the surface exposed to air, and a plane on the other side of the dielectric.



Edge-Coupled Coated Microstrip: is a differential configuration with two controlled impedance traces on the surface coated with solder mask, and a plane on the other side of the dielectric.



Edge-Coupled Offset Stripline: is a differential configuration with two controlled impedance traces within the PCB sandwiched between two planes on both sides of the dielectrics (core/prepreg).


What Impedance Target Should I Consider?

impedance target on circuit graphic

In general, what is important is not the value, but rather that the impedance is controlled along the entire length of the trace. Most designs will have some sort of specification constraints that would determine the impedance that you need to work with (e.g. 90 Ohms for USB diff pairs, 65 Ohms for PCI). In general, the PCB trace impedance would range between 40 and 120 Ohms. And note that the higher the impedance, the more difficult it is to control it due to narrower traces (which will make it relatively more affected by the exact etch factor!).

What tolerance target should I consider?

It’s common for the finished trace impedance to be around +/-10% of the target value, which gives the manufacturer some room to achieve an acceptable yield. So the tolerance should not be used by designers to approximate the nominal impedance value! If for example you have a finished trace with an impedance target of 50 Ohms +/-10%, then a manufactured trace with 55 Ohms is within tolerance, however it doesn’t leave much room for your manufacturer to move, and this could lower the yield.


With more boards carrying high speeds signals, more traces will be requiring impedance control. This control needs to be accurate and calculated with a solver that precisely represents the properties of your actual layer stack, including accurate materials properties. While a good integrated solver with your tools is the right starting point, designers should still work and communicate with their fabricators to ensure they have the capabilities to meet their requirements.

About Author

About Author

David currently serves as a Sr. Technical Marketing Engineer at Altium and is responsible for managing the development of technical marketing materials for all Altium products. He also works closely with our marketing, sales, and customer support teams to define product strategies including branding, positioning, and messaging. David brings over 15 years of experience in the EDA industry to our team, and he holds an MBA from Colorado State University and a B.S. in Electronics Engineering from Devry Technical Institute.

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