How to Design Castellated Holes and Edges in a PCB for an SMD Module

Zachariah Peterson
|  Created: May 27, 2021
Castellated holes in a PCB

SMD modules like the ESP32-WROOM or Raspberry Pi Pico microcontroller board use a particular mounting style called castellation PCB. If you look at these modules, it should be evident how castellated holes PCBs can be used to mount a PCB module as an SMD component. These small modules are becoming more popular and are simple to work with, but they might look a bit specialized for use in the standard PCB fabrication process.

Although modules with castellated holes and add-on holes for pin headers might not seem to fit into the standard list of design objects in your CAD software, there is a simple strategy for placing an array of castellated holes on a module. You’ll have to approach this while thinking about the fabrication process and some difficulties in assembly, but the basic objects in your ECAD tools can be used to easily place castellated holes on your PCB.

Castellated Edges in Your ECAD Software

Castellated holes are used on small modules as an alternative to pin-header mounting. Think about an Arduino hat or shield board form factor; instead of using pin headers to mate two boards, you can design the main board with  castellated pads to mount an array of castellated holes.

This allows you to mate a small module, such as a Wifi expansion module or a motor driver module, to your main PCB with SMD soldering. Instead of using a pin header, using castellated holes on your module will provide a strong soldered connection between the module and your carrier board. To make this work, you need to design two arrays:

  • Castellated holes array along the edge of your SMD module
  • Pad array on the surface of your carrier board to hold your SMD module

Designing the Castellated Holes PCB Array on Your Module

Castellated holes come in two flavors. First, they can be placed as a half-hole along the edge with an attached pad. The other form of castellated holes includes a plated through-hole just inside the half-cut hole along the board edge. The typical arrangement of castellation PCB with the inner plated through-hole is shown below:

Castellated holes
A rough layout of castellated holes along the edge of a PCB.

Here, you only need to use regular pads in your PCB layout tools to define an array of castellated holes. Simply line up your catellated pads with through-holes along the edge of the board, and then place another pad that runs right up to the edge of the board to provide additional copper onto the pad.

The second array of holes behind the board edge is optional, and you won’t find these holes on every SMD module that uses castellated holes. The 2nd row of holes can be designed to accept a pin header or small gauge wire. This is something you might do when you’re prototyping with a module or if you’re testing a module before mounting it on your carrier board. If you use a pin header, you’ll have to solder the header into the hole from the back side of the module. You also won’t be able to mount the module on your carrier board if you use too much solder. Keep this in mind if you’re considering using pin headers with a 2nd row of plated through-holes in a production castellated module.

The image below shows an example of how these can be placed in your PCB layout tools. In this image, I’m mid-way through designing a small module with an array of castellated holes along the board edge. Note that I’ve placed standard castellated pads with plated through holes, and the through holes hang over the edge of the board. This overhang can be addressed in fabrication.

Castellated holes placed as PCB pads
PCB with castellated holes placed as standard pads in a PCB layout.

Designing the Pad Array on Your Main Board

The pad array on the main board should follow standard land pattern design guidelines for other SMD components. Although the castellated holes will be treated as a through-hole feature in terms of soldering, these castellated holes can be soldered to a pad just like a typical through-hole component. After soldering, there will be a leftover solder fillet that is visible along the wall of the hole. SparkFun has a great tutorial on this, and the end result is shown below.

Castellated holes soldering
Module with castellated edges soldered to a carrier PCB. Source: SparkFun.

If you want to ensure reliability, or if you’re designing a high-reliability application that requires IPC Class 3 compliance, then there are some important points to consider when creating your castellated holes PCB array. Here, you need to design the pads on the main board so that they are large enough to accept the entire solder fillet. It’s also a good idea to use a small solder mask expansion around the pads (maybe ~4 mils on each side) to hold the molten solder and prevent bridging.

In addition, if you’re using a 2nd row of holes in your array, it’s important to place some solder mask in the region between the holes to create a solder dam. Do this on the pad for the carrier board as this is where the solder paste will be applied. This will prevent molten solder from wicking into the back hole.

Solder dam castellated holes
Place some solder masks on the main board pad to prevent solder wicking.

Fabricating a PCB With Castellated Holes

Once you’ve placed the castellated holes onto your PCB, how do you get the bare board fabricated? The goal here is to ensure high quality and yield in a standard process, but Altium castellated holes PCBs do not seem to fit into the standard PCB fabrication process. Your fabricator can help you ensure your design will pass through fabrication by modifying the Gerbers to indicate drill hits and required plating along the board edge. This normally requires the following Gerbers (X2 format):

  • Copper layers (GTL and GBL)
  • Solder mask openings defined on both board surfaces (GTS and GBS)
  • Drill files (TXT/DRL)

Some would say that the natural alternative to castellated holes PCBs is to just use solder pads to mount the module to your main board, just like any other SMD component. The main problem with this is the potential for contamination; the pad array on the carrier board can trap exhaust from some fluxes during reflow soldering. Another possibility is that excessive solder paste along the pad array lifts the module. This is similar to what can happen with SMD ICs that have a large ground pad in the center of the component.

When soldering a castellated holes PCB array, the solder fillet will be exposed during soldering. As long as the pad array on the main board is designed properly as described above, it’s a simple matter to apply solder paste and place the combined boards through reflow soldering, hand soldering, or selective soldering. You won’t have the potential for component liftoff or contamination from some fluxes during soldering.

With the best PCB design tools in Altium Designer®, you can easily create castellated edges in your PCB layout. You can also instantly create the fabrication files your manufacturer needs to correctly place your Altium castellated holes PCB array.

When you’ve finished your design, and you want to release files to your manufacturer, the Altium 365™ platform makes it easy to collaborate and share your projects. We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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