Ground Bounce Reduction Techniques to Minimize Signal Integrity Issues

February 19, 2018 Altium Designer

Man’s legs dribbling basketball on blue court

 

Unlike my dad who thrived on the basketball team during his school days, I could barely bounce the ball during tryouts. Needless to say, I quit sports before I even started. While my dreams of becoming an NBA pro were dashed, I later discovered my passion for martial arts. I never really got into handling a basketball well, but in martial arts at least I could bounce off the balls of my feet to meet my opponent.

 

Not being able to bounce the basketball is one thing. Not understanding ground bounce in electronics, however, can be very problematic for your circuits. To excel as a PCB designer, being knowledgeable about the effects of ground bounce on circuits is necessary. By taking ground bounce reduction techniques into consideration, you can minimize ground bounce across your designs and protect your design against signal integrity issues.

What is Ground Bounce?

To understand ground bounce, you need to dive into the basics of transistors that form the core of integrated circuits (IC). The image below shows the Complementary metal–oxide–semiconductor (CMOS) circuitry of ICs like microcontrollers and Random Access Memory (RAM).

 

Diagram of CMOS logic gate

Ground bounce in CMOS logic gate

 

 

In most designs, the output pin is usually connected to a capacitive load. When the output pin is asserted to logic ‘1’, the load is fully charged to VCC. As the output is turned off to logic ‘0’, a quick rush of current flows from the output to the ground.  

 

In an ideal situation, the ground of the IC package and the board will remain at the same voltage. In most realistic situations, however, an inductance is present between the die-ground and the board ground due to the bond wire, lead frame, and the board inductance itself.

 

As the current rushes through the inductance, a voltage builds up between the die-ground and the board ground. This causes a phenomenon where the die-ground and the board ground are at different voltage levels for a momentary period, which results in ground bounce.

How Ground Bounce Affects Circuits

At a minimal level, ground bounce does not cause any disruption to electronics. However, when the ground bounce is significant, especially when multiple outputs are turned off simultaneously, the ground level of the device rises to a level that may affect other operations.

 

For instance, a microcontroller experiencing ground bounce may have its ground shifted to 1.5V. A logic IC operating at 3.3V that is connected to the microcontroller may interpret a logic ‘0’ signal as a ‘1’ because it is receiving a 1.5V logic ‘low’ signal due to the shifted voltage level of the device ground.

 

A device that is experiencing a ground bounce could also misread inputs from other components. For example, a logic ‘high’ signal would be misinterpreted as ‘low’ because the voltage at the input pin is 1.8 V instead of 3.3V, due to the rise in the device ground. This is below the minimum logic high voltage of 2.31V.

Tips to Reduce Ground Bounce

The easiest way to reduce the effects of ground bounce is to place a bypass capacitor close to the affected component. This will make the current flow to and from the capacitor when the output logic level changes quickly. It is important to place the bypass capacitor as close to the VCC pin of the component as possible to minimize the total inductance of the ground trace.

 

Placing a resistor in series to the output load can reduce the transient time of the changing signal. This is only applicable when the output is not timing-sensitive, such as an address bus for a parallel SRAM. This method works in control pins that trigger outputs, like a relay or LED.

 

The effect of ground bounce is at its worst when all outputs are simultaneously driven low. That’s when the voltage difference of the die-ground increases drastically. To prevent this, try to spread out the timing where outputs are driven low. Here, even additional milliseconds of delay can make a significant difference.

 

As a general rule, you should avoid placing glitch-sensitive signals such as RESET, CHIP SELECT, or SET on the same logic IC that is prone to ground bounce issues. Overall, output pins that are closer to the GND pin experience less ground bounce issues. Therefore, you should place critical signals on pins next to the GND pin.

 

Close-up of circuit board with bypass capacitors

Place bypass capacitors next to logic components.

 

Detect Potential Ground Bounce Issues in Your Design

Ultimately, placing bypass capacitors is an effective method that is applicable to a broad range of designs. It maintains a good power delivery network and reliably reduces ground bounce. To minimize uncontrolled voltage drops across your designs and uncover other potential power issues, try the Altium PDN Analyzer.

 

With this tool, you can simulate power delivery across multiple networks simultaneously and easily identify DC voltage or current density issues. But the best part is that it is located within Altium Designer’s PCB design software, available for you to transition from schematic to simulation within the same unified design environment.


Is ground bounce wreaking havoc on your design? Get help from an expert at Altium.

About the Author

Altium Designer

PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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