Free Trials

Download a free trial to find out which Altium software best suits your needs

Altium Online Store

Buy any Altium Products with few clicks or send us your quote to contact our sales


Download the latest in PCB design and EDA software

  • Altium Designer

    Complete Environment for Schematic + Layout

  • CircuitStudio

    Entry Level, Professional PCB Design Tool

  • CircuitMaker

    Community Based PCB Design Tool


    Agile PCB Design For Teams

  • Altium 365

    Connecting PCB Design to the Manufacturing Floor

  • Altium Concord Pro

    Complete Solution for Library Management

  • Octopart

    Extensive, Easy-to-Use Component Database

  • PDN Analyzer

    Natural and Effortless Power Distribution Network Analysis

  • See All Extensions

    World-Renowned Technology for Embedded Systems Development

  • Live Courses

    Learn best practices with instructional training available worldwide

  • On-Demand Courses

    Gain comprehensive knowledge without leaving your home or office

  • Altium 365 Viewer

    View & Share electronic designs in your browser

  • Altium Designer 20

    The most powerful, modern and easy-to-use PCB design tool for professional use


    Annual PCB Design Summit

    • Forum

      Where Altium users and enthusiasts can interact with each other

    • Blog

      Our blog about things that interest us and hopefully you too

    • Ideas

      Submit ideas and vote for new features you want in Altium tools

    • Bug Crunch

      Help make the software better by submitting bugs and voting on what's important

    • Wall

      A stream of events on AltiumLive you follow by participating in or subscribing to

    • Beta Program

      Information about participating in our Beta program and getting early access to Altium tools

    All Resources

    Explore the latest content from blog posts to social media and technical white papers gathered together for your convenience

    Altium Online Store

    Buy any Altium Products with few clicks or send us your quote to contact our sales


    Take a look at what download options are available to best suit your needs

    • Documentation

      The documentation area is where you can find extensive, versioned information about our software online, for free.

    • Training & Events

      View the schedule and register for training events all around the world and online

    • Design Content

      Browse our vast library of free design content including components, templates and reference designs

    • Webinars

      Attend a live webinar online or get instant access to our on demand series of webinars

    • Support

      Get your questions answered with our variety of direct support and self-service options

    • Technical Papers

      Stay up to date with the latest technology and industry trends with our complete collection of technical white papers.

    • Video Library

      Quick and to-the-point video tutorials to get you started with Altium Designer

    How Antipads Affect Signal Integrity in Your Multilayer PCB

    Zachariah Peterson
    |  November 17, 2020
    How Antipads Affect Signal Integrity in Your Multilayer PCB

    Antipads on vias and landing pads are a point of contention in modern PCB design, and the debate around the use of these elements in a multilayer PCB is framed as a binary choice. Like thermal reliefs, ground plane splits, and orthogonal routing, the debate around antipads on landing pads and vias is framed as an always/never choice. With today’s modern PCBs, it pays to understand the effects of antipads on signal integrity.

    Antipads and Signal Integrity

    When it comes to signal integrity, be careful with application notes from component manufacturers, and always validate what you see from well-understood concepts. If you look at some component application notes, they will recommend placing antipads on landing pads without explanation. In addition, different notes will tell you precisely the via antipad diameter you should use, but it is easy to take this out of context. Let’s look closely at these two situations and how the structure of a via/pad + antipad can lead to signal integrity problems.

    How to Model a Via and its Antipads

    A via antipad is applied automatically by your CAD tools based on your clearance rules anytime you use a plated-through hole to transition through a solid plane. If you’re routing through a plane layer, your options are to completely remove a large section of the plane around the via or encircle the via in the remaining conductor to create an antipad. No matter what happens, there must be some void between the via wall and any planes in order to prevent shorting.

    At this point, if you’re routing through a solid plane, the question is not whether you should use a via antipad or cut away the plane around the, but rather how large should the antipad extend past the via pad and any internal nonfunctional pads. Like many potential problems in high speed design, all vias have parasitics:

    • Inductance. A via taken in isolation is basically an inductor, and the inductance of the via depends on the via aspect ratio.
    • Capacitance. The presence of the plane around creates some parasitic capacitance between the via pads and ground.

    Each pad at the end of the via and the intervening plane creates two capacitances in parallel. When combined with an inductor, we have a standard pi model describing a via and their antipad, as shown below. Note that the capacitance equation shown below is only an approximation as it does not consider fringing fields. The via inductance equation is also an approximation.

    Pi model with antipads
    Pi model for a via and its antipads.

    What happens next (in terms of electrical behavior) depends on a number of factors. First, just like any pi circuit, the CLC pi model is basically a low-pass filter with the 3 dB cutoff frequency defined above. Suppose you want to extend the bandwidth of your via + antipad arrangement. In that case, you’ll need to reduce the aspect ratio (shorter via or wider barrel diameter), or decrease the pad-plane-pad capacitance (larger antipad).

    Here, you have a difficult set of options to balance. Modern designs are getting denser with smaller features, so there is a danger your aspect ratio becomes quite large, the 3 dB frequency would decrease and limit bandwidth. Once you get to the mmWave regime, you’ll have other signal integrity challenges involving routing through vias. Additional parasitics become dominant at these frequencies and contribute to overall insertion loss along an interconnect.

    How an Antipad on a Landing Pad Affects Signals

    Placing an antipad on a landing pad involves cutting away some ground plane beneath a pad on a component. An example on an antenna feedline is shown below (pad + antipad is circled in yellow). The antipad in the blue ground plane region is shown below and was placed as a polygon cutout.

    Antenna feedline antipad
    Antipad on an antenna feedline.

    There is one good reason to do this, but there are other reasons you should not do this, and they outweigh each other at different frequencies and in certain situations. In the above case, placing the antipad eliminates some parasitic capacitance; the field carried by a signal then couples back to the ground plane only through fringing fields. This is one alternative to using a smaller landing pad.

    The above example is a bit contrived, and I would not do this in a customer’s board without validation through simulations, but it illustrates a good point about return path planning. Even though there is a ground cutout below the pad, there is still a clear return path through nearby vias and ground pour, so a major impedance discontinuity is not created in this process. Without such assistance from ground pour and vias back to a reference plane, you’d create a significant impedance discontinuity due to a large return path.


    In summary, if you want to control via bandwidth and parasitics, you have a few levers you can pull. Antipads on vias give you a simple way to tune the parasitic capacitance to match the inductance for a given via aspect ratio. The dielectric constant (Dk value only) can also be used as a tool for controlling via capacitance.

    Regarding antipads on landing pads, you’ll create a small impedance discontinuity, which can create some small insertion loss and return loss at the pad. In high speed channels where bandwidths can extend up to 100 GHz and beyond, every last bit of insertion loss you can avoid is critical. My view is to play it safe and not use any antipads on landing pads unless you absolutely need to do this to set a landing pad’s impedance to some specific value, thereby reducing return loss.

    Whenever you need to design an antipad for use in your PCB, you can use the complete set of rules-driven design tools in Altium Designer®. When you need to share your work with your collaborators, you can use the Altium 365® platform to share and manage your design data. We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.

    About Author

    About Author

    Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to electronics companies. Prior to working in the PCB industry, he taught at Portland State University. He conducted his Physics M.S. research on chemisorptive gas sensors and his Applied Physics Ph.D. research on random laser theory and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensing and monitoring systems, and financial analytics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written hundreds of technical blogs on PCB design for a number of companies. Zachariah currently works with other companies in the electronics industry providing design, research, and marketing services. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.

    most recent articles

    Back to Home