Power Integrity Analysis for Your Power Delivery Network

Zachariah Peterson
|  Created: March 15, 2019  |  Updated: December 23, 2020

power resistor

The first time I built a simple mixed signal board for powering and collecting data from a small group of sensors, I was astounded at the level of noise in my analog measurements. Surely, the $5,000 meter and DAQ card setup I was using couldn’t be faulty, and the output fluctuations from my power supply must be lower than the noise being measured. How could I be seeing such noise problems?

Little did I know, some poor design decisions on my mixed signal board created the opportunity for noise to build up throughout my board. Working with the right design and simulation software, as well as some smarter design decisions, would have saved plenty of time and headache. Even if you're not working with a high speed PCB, noise from the PDN can be felt as noise in your digital or analog components, but some basic design decisions can help ensure your components receive stable DC power.

Power Integrity Problems to Identify in Your PCB Layout

There are a few places to look for power integrity problems in your PCB's power distribution network. These points can be investigated both in pre-layout simulations, post-layout simulations (AC or DC), or from measurements:

  • DC power loss: Because all conductors have nonzero resistance, there will be some loss in voltage across the conductors in the PDN. Post-layout This cannot be measured in a finished PCB without placing copious test points, but a PDN analyzer tools will show you areas with high power dissipation. Voltage drop across a PDN can also be seen in a heat map.
  • High PDN impedance: Like any other electrical element, the complex structure of a PDN has some capacitance and inductance, creating a complex PDN impedance spectrum. The PDN impedance needs to be kept low to prevent a transient current drawn into the PDN from being seen as large voltage fluctuations at the power pin of an IC.
  • Ripple on the DC power bus: Here, we're not referring to residual ripple from a rectifier bridge. We're worried about the voltage fluctuation seen at an integrated circuit as it draws current into the power bus (supply bounce) or sinks current into a ground plane (ground bounce). This is related to the PDN impedance via Ohm's law. There will always be a small amount of ripple on the DC power bus, but as long as it is small it will not interfere with the operation of components.
  • Radiated EMI from a PDN due to high impedance: High impedance does more than create a ripple on the DC power bus, it can also create strong EMI from specific areas of the board that have high impedance.

Gathering power integrity measurements can be as simple as using an oscilloscope to spot glitches on the power bus while a board is operational, or it can involve a VNA measurement to determine the impedance spectrum. Simulations are generally confined to two areas during the design process, but simulations are an important of power integrity analysis.

Pre-layout Simulations

At the schematic level, you can't simulate the real structure of a PDN and the impedance it creates. However, you can simulate things like AC-DC conversion (e.g., rectification), DC-DC conversion, and how noise affects overall electrical behavior. These simulations can get rather complex, but overall they are important as a first check of power stability in circuit design. Your schematic will need either SPICE subcircuit models for your specific components, or you'll need a finished circuit model built from generic components.

Power integrity analysis PCB layout
Power integrity analysis in pre-layout simulations can be used to quantify ripple from a rectifier or examine how noise affects circuit behavior.

If you're designing circuits from discrete components or you're building a circuit model for a more complex system, you can simulate how instability in the DC power bus affects the voltage seen throughout your circuits. DC power instability will propagate to the output from a circuit, it's simply a matter of determining whether glitches on the DC power bus will appear as large glitches in the circuit output. A transient analysis simulation with a noisy AC source superimposed on a DC voltage will allow you to directly compare the input and output from a circuit and determine acceptable noise levels on your PDN.

Post-layout Simulations

DC power distribution and IR drop in a real PDN can be determined with a DC simulation involving resistance calculations. PDN analysis utilities are used to spot points in a PDN where voltage drops are rather large. For low power boards, this may not be necessary as long as sufficiently large power and ground plane conductors are used in the board. However, for something like a motor or LED controller, large current in a high resistance portion of the PDN can create a hot spot with non-negligible DC voltage drop. This can be spotted the voltage and current distribution outputs from a PDN analysis simulator.

Power integrity analysis PDN
This heat map is generated from a PDN analyzer in a finished PCB layout and shows how current and voltage are distributed in the PDN.

Ideal potential differences in your ground plane should reach sub-mV levels. A difference in ground plane potential as small as 1 mV can cause ground loops that interfere with sensitive DC or analog measurements, but this will certainly not be large enough to cause involuntary switching in digital circuits. Whether you actually notice such a problem depends on what you are sourcing or measuring. Noise induced by power supply-dependent fluctuations in the ground loop potential can be reduced by using a large capacitor across the power supply outputs or across the power and ground plane connections to the power supply.

PDN impedance is difficult to simulate directly as a real PDN is a multiport network and is described using an impedance matrix (i.e., Z-parameters). Field solver utilities are needed for these AC simulations from a finished PCB layout. Large PDN impedance not only creates a large voltage fluctuation seen at components, it can also create excessively large radiated EMI, which can jeopardize the product's EMC certification. For a tutorial on this point, take a look at this article.


The primary PDN measurement is an impedance measurement, and in some cases a near-field EMI measurement. The two are related, as I've discussed above. For PDN impedance, a spectrum analyzer is normally used and compared to PDN impedance simulation results (Z-parameters). For EMI, a simple first check during operation is to use a high bandwidth oscilloscope with a low impedance, low attenuation ratio near-field probe to check for near-field emission during operation.

A high PDN impedance can explain large voltage fluctuations and radiated near-field EMI seen on the power bus while a board is operational. To reduce PDN impedance, you can only focus on specific frequency ranges using decoupling capacitors. Due to self-resonance in real capacitors, the PDN impedance cannot be brought sufficiently low at all frequencies. Therefore, plane capacitance is also needed. Read more about designing to low PDN impedance in this article.

Brief Design Guidelines to Ensure Power Integrity

To summarize, power integrity involves checking that the power seen at your components is equal to the value you intended to output from your power regulator. In addition, as the board runs at full power, you need to check that the DC voltage in the PDN does not exhibit large fluctuations. Going further to reduce noise created by grounding problems and ensuring power integrity throughout your device depends in part on the type of power supply you use. For example, a switching power supply generates its own noise due to the high current it draws during switching; this noise is spread out up to MHz levels and can be quite noticeable in high current regulators. Unregulated power supplies output significant ripple in addition to their intended power output, as do regulated power supplies to a lesser extent.

These variations cannot be solved completely at the PCB level, although a can make an attempt to filter out noise at the switching frequencies. You should always use best design practices to protect critical signal traces and power rails from EMI, regardless of whether this EMI originates from other components on a board, from a power supply, or externally.

Finally, ground bounce can arise for similar reasons as power bus ripple in a PCB due to parasitic inductance seen by signals being sunk into the ground plane. Vias have some natural inductance (usually at the nH level) which, together with package inductance, creates a transient response that can be seen when a large number of CMOS buffers switch simultaneously. According to Ohm’s law, this requires that the ground potential increase near the via, i.e., the ground potential seen at that IC is greater than that seen at neighboring ICs. This is the essence of ground bounce, thus the need for bypass caps to provide stable power.

Integrated circuits on a black PCB

Identifying power integrity problems, their influence on signal integrity, and determining the best options for correcting them takes PCB design software with the best simulation and analysis tools on the market. Altium Designer® contains all of these features and many more in a single interface. The signal integrity tools come standard with Altium, and a powerful PDN Analyzer is available as an add-on that is conveniently available within the program. 

Now you can download a free trial of Altium if you’re interested in learning more about its signal and power integrity analysis tools. You’ll also have access to the industry’s best layout, routing, and data management features. Talk to an Altium expert today to learn more.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.

Recent Articles

Back to Home