The Benefits of High-Dk PCB Materials

The terms “high-speed design” and “low-Dk PCB laminate” are often used in the same articles, and often in the same sentence. Low-Dk PCB materials have their place in high speed and high-frequency PCBs, but high-Dk PCB materials provide power integrity. Low-Dk PCBs are typically chosen as they tend to have lower loss tangent. Thus high-DK PCB materials tend to get overlooked for high speed and high-frequency PCBs.

When we look at power integrity for high speed/high-frequency boards, rather than just signal loss or accepting the value provided by a high-speed laminate, you should consider dielectric constant as part of the overall strategy for stable power. This includes the real and imaginary parts of the dielectric constant, as both affect your PCB's power integrity. With this in mind, let’s look at the role played by high-Dk PCB materials in ensuring power integrity.

High-Dk PCB Materials and PCB Power Integrity

First things first, when we look at power integrity, we’re always trying to ensure that the voltage you output from your regulator stages remains constant as power flows throughout the PDN. This brings up two aspects of PDN analysis and power integrity:

• DC analysis: Here, we’re only concerned about IR drop across the conductors that make up the PDN. The dielectric constant doesn’t play a role in DC analysis.
• AC analysis: By AC analysis, we mean the behavior of any time-varying current on the power plane. This is where the impedance of the PDN becomes essential, as the voltage variation seen at a downstream component is the product of PDN impedance and the time-varying voltage (Ohm’s law).

A high-Dk PCB material used as the dielectric between the power and ground plane provides some important power integrity benefits. In particular, a high-Dk value for PCB material between the ground and power planes will provide larger interplanar capacitance, meaning your planes act like a larger decoupling capacitor, and PDN impedance will be lower. Placing the ground and power planes closer together also increases interplanar capacitance. Some example simulation results from a 2006 IEEE paper are shown below.

The other important aspect of dielectric constant is the imaginary part or the Df value. This is usually summarized using the loss tangent, but this is not the only metric to use in examining the usefulness of a particular laminate in high speed/high-frequency boards. Dispersion in the laminate is also quite important for digital signals as it will cause signals to stretch and distort in your board. For power integrity the Dk and Df values matter together as follows:

• High-Dk preferred: A higher Dk is preferred because it generally results in lower overall PDN impedance. This is because the PDN will have more plane capacitance.
• High-Df preferred: The reason a higher Df is desired in the dielectric between ground and power is because the lossy dielectric naturally dampens resonances in the PDN impedance curve. This is seen by comparing the solid blue and black lines.
• Thin layers preferred: A thinner layer creates more PDN capacitance and confines more of the electromagnetic field in the lossy substrate, so the PDN impedance curve moves lower and the PDN resonances have smaller peaks.

To summarize, for power integrity in a PDN, the best case is to have high Dk, high Df, and a thin layer (see the solid black curve above). This is why embedded capacitance materials used in advanced high-speed PCBs have a very high Dk value and are lossy, so you would not want to route signals over them.

High-Dk and Signal Integrity

For signal integrity, the important parameters are the Dk and Df values individually, rather than just looking at the loss tangent. The exception is when you get to very thin layers that you might use in a high-layer count/HDI PCB; I'll discuss this type of case more below. Note that, for low-loss PCB substrates, the Dk and Df values tend to scale together (e.g., Rogers laminates), but this is not always the case. You can see some examples in popular laminates; for instance, Nelco 4000-13 EP has about 20x lower loss tangent than FR4, but the Dk value is only about 10% lower.

The importance of the Df value and the usefulness of some material sets for different high-speed signaling standards is outlined below. Note that Dk plays no role in this table; what generally matters is the loss tangent and the copper roughness.

Dk does start to play a role if you have power rails and signal on the same layer, such as in a SIG+PWR/GND/GND/SIG+PWR stackup. To summarize, there are a few cases where high-Dk/low-Df and high-Dk/high-Df provide some benefits both for signal integrity and power integrity, and it's important to know how to mix these:

• If power rails and signal are mixed on the same layer in low layer count PCBs, higher Dk may be preferred
• If power and signal are separate onto different layers, higher Dk is preferred for power/ground separation

The 2nd option in this list implies that you could create a hybrid PCB stackup, where different laminate materials are used. Depending on the laminate materials involved, you may save some costs by mixing and matching laminates, rather than choosing a single exotic material for the entire stackup.

Hybrid PCB Stackups: The Best of Both Worlds

You can see the benefits of a low-loss dielectric for signal integrity and a high-Dk dielectric for power integrity in a hybrid PCB stackup. In this type of stackup, the high-Dk layer would be a better option for separating power and ground planes in the PDN, which will reduce PDN self-impedance and transfer impedance. You would then want to use a low-Dk material with low loss to support signals on the surface layer and encase stripline geometries on the interior layers.

An example of a 10-layer board is shown below. These stackups can be a bit odd and difficult to create as you want to ensure symmetry. This ensures that any stress created by CTE mismatches is uniform, both during assembly and operation. Note that any of the ground planes could be swapped for a power plane with different voltage, and it could still serve as a reference for an adjacent signal layer.

Before creating a hybrid stackup, be sure to consult with your fabricator regarding their capabilities and which materials they recommend using. If you opt to design a hybrid stackup, your fabricator may recommend some limits on CTE mismatches between different laminate materials, constraining your available options. Although PCB design software will basically allow you to create any stackup you like, it does not mean your manufacturer will be able to produce it. Always check with a fabricator before producing this type of stackup to ensure they know how to handle these boards and prevent delamination during assembly.

Note that all of these layers are assumed standard resin systems with fiber reinforcement, or what we would consider a standard FR4-type laminate material. In the RF world, we often default to unreinforced PTFE, which only uses a ceramic filler but has no fiberglass. Thin PTFE layers can also be used in a hybrid stackup; see this article to learn more.

High-Dk Can Limit Manufacturability on Thin Laminates

One of the downsides of a high-Dk material for a signal layer is manufacturability. This arises because of the trace widths required when impedance control is enforced. Trace widths need to be thinner to hit a target impedance when placed on a high-Dk material versus a low-Dk material.

On thick laminates, this is a non-issue, and the high-Dk value may be beneficial: trace widths need to be thinner, so it may be easier to route into certain components. On thin laminates, this will be a problem because, eventually, the trace width gets so small that you start to hit the limit of fabrication capabilities. Etch tolerances now become a significant fraction of the trace width, so you get greater variation in the trace impedance. By "thin laminate", we're referring to 2 mil outer laminates for microstrips, or 2-4 mil inner laminates for striplines.

Therefore, on very thin laminates, it's best to go with a low-Dk material like a PTFE lamiante to ensure producibility. PTFE materials have a problem of being difficult to handle when they have no fiberglass reinforcement, therefore a reinforced laminate may be preferred if signal bandwidths do excite excessive fiber weave effects.

Other Important Effects of High-Dk PCB Materials

Here are some of the other important effects of high-Dk PCB materials in your circuit board.

• Slower signal propagation. This means your allowed length mismatch in parallel nets and differential pairs will be smaller (for a given timing mismatch). However, with the right routing and impedance control tools in your PCB design software, this becomes a non-issue.
• Smaller transfer impedance. As I discussed in a recent article, transfer impedance describes how a PDN voltage disturbance created by a switching component affects the voltage fluctuation seen at a different component. If the Dk value for the dielectric is larger, then the transfer impedance is smaller, the voltage fluctuation seen at the other component is smaller. The Df value also plays a role here, in that a lossy substrate will dampen the voltage fluctuation seen at other components (see Fig. 12 in this article).
• Delayed fluctuations between different components. When a fluctuation occurs at one component, it takes some time to propagate along the PDN to other components. When the dielectric’s Dk value is larger, the delay between fluctuations at different components is longer. However, bypass capacitors placed at other components will compensate for any fluctuation, and the correct bypass capacitor makes this a non-issue.
• Interplanar cavity anti-resonances move to lower frequencies. This becomes important out to GHz bandwidths. At a cavity anti-resonance, the impedance peaks at a particular frequency. Using a thinner high-Dk material with a larger loss between ground and power planes dampens these anti-resonances (see Fig. 11 in this article). I’ll discuss this issue with resonances in cavities and waveguides more in a future article.

Summary

If you’re building a hybrid stackup for a high speed/high-frequency board, you should use a high-Dk/high-Df dielectric between the ground and power planes. If you’re using the same laminate material throughout the stackup, you can balance power integrity and signal integrity if you use a high Dk/low Df dielectric.

The downside to using high-Dk PCB materials is a stronger capacitive coupling between conductors. This means parasitic capacitances involving the substrate are larger, and you would have to reduce this by using a thinner dielectric to the ground plane. This then drives you to using narrower traces, as I mentioned above. If this sounds esoteric, it is your trace capacitance values will be larger; thus, your trace inductance values need to be larger to ensure impedance control. This then means crosstalk will be stronger, so trace separation should be larger to compensate for the larger Dk value.

Your PCB stackup is a major determinant of power integrity and signal integrity. You can ensure your board functions correctly in both aspects when you have access to the right PCB design and analysis tools. The Layer Stack Manager in Altium Designer® gives you access to a library of common and specialized PCB laminates. You can define material parameters for a specialty laminate for your PCB. The integrated 3D field solver from Simberian uses these material parameters to model signal behavior in your PCB as you create your PCB layout.

Altium Designer on Altium 365 delivers an unprecedented amount of integration to the electronics industry until now relegated to the world of software development, allowing designers to work from home and reach unprecedented levels of efficiency.

We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.