When we talk about copper roughness, we always bring it up as if it were a universally bad thing. The fact is, some circuits will always function just fine even if the copper is rough. As long as your traces are fabricated to spec in every other area, the roughness of the traces might not matter as long as your operating frequency or bandwidth are low enough. Just what constitutes “low enough” and when is the effect of roughness so small that we can ignore it?
In a recent article about copper foils, I provided some background on the different types of copper foils and some ranges of roughness values you can expect from these foils. As you start looking for materials to build your high frequency design, it’s worth determining whether the roughness factor will affect impedance and losses to a degree that is excessive. In this article, I’ll show three strategies you can use to determine whether roughness should be minimized in your design. This involves looking at data, or doing a few simple calculations to determine roughness.
This is an important question and it can be approached from at least two perspectives. As soon as you tell a designer “Hey, you need to include copper roughness in your impedance calculation,” they probably want to throw out their impedance calculator and give up on getting accurate impedance predictions.
The reality is that copper roughness won’t produce noticeable effects below certain frequencies. If you’re operating with standard lower-speed digital buses (I2C, SPI, UART, or just switching your GPIOs), then you won’t need to worry about copper roughness for two reasons:
However, if you’re designing with the newest iteration of common digital protocols, 5 GHz WiFi, low-SNR RF printed circuits, radar systems, or ultra-fast digital protocols (56G+ SerDes), then copper roughness will definitely matter and it should be examined when selecting materials.
Without over-generalizing, there are two ways to approach the problem and determine if copper roughness will matter in your design:
Option #1 is the first thing you would do to get to an S11 prediction for your interconnect. Options #2 and #3 are basically the same if you think about it… you’re just comparing S21 measurements and calculation. The idea here is to see when different types of PCB copper foil produce excessive loss compared to nearly perfect copper, and how much loss that is.
The type of impedance calculator you'll find in your PCB design software is excellent for getting a reasonably accurate estimate of the effects of rough impedance as long as you have access to the roughness parameters for your material sets.
Assuming you can get the roughness data, either from a direct measurement of the surface profile or from microscope images like those shown above, you can use this to calculate impedance with and without roughness.
Just as an example, take a look at the symmetric stripline results shown below. The rough and smooth results were simulated with 4 mil dielectric layers, unmodified Dk = 4.17 with no dielectric dispersion, and rough impedance results with two models (Hammerstad and Cannonball-Huray). Our stripline width comes out to W = 3.008 mils, which is a bit small.
If we ignore the roughness, the impedance will be overestimated by about 5%! We also see that the deviation in the real part of the impedance, which is where all the losses start to arise, just keeps growing… This is because we totally ignored how roughness modifies Dk, causing it to appear larger than the nominal (engineered) value.
This is one case where it is clear that using a lower Dk laminate is important. It will require you to use a wider trace so that you can sit within standard fabrication capabilities. THe side benefit is you will likely see lower losses in that situation.
Option #2 is pretty simple as long as you have some S21 data for your material set. By looking at the dielectric loss data (assuming that is the most important factor on an electrically long interconnect), you can judge approximately at what frequencies copper roughness losses will be Just as an example, the image below shows some data from Rogers for a ½ oz./sq. ft. copper foil on a 4 mil liquid crystal polymer (LCP) laminate (see here for original data).
From the above graph, the differences between these curves are negligible at frequencies below about 2 GHz, but we can see that the insertion loss curves for different copper roughnesses are very different at high frequencies. If you were operating at high frequencies, and loss was an important factor, you could weigh this against costs for your particular laminate. Alternatively, if you only had one class of rough copper available from your laminate vendor, you could look for an alternative laminate with lower dielectric loss.
As long as you could get insertion loss data from other material vendors, then you could make similar comparisons. However, when this data is not directly available, you would need to use their roughness values and loss tangent values for various material options to estimate the insertion loss at your operating frequency. You can actually calculate this directly with the following process:
Just to make things easy, and to eliminate the need to run a lossless to lossy transformation for the impedance, you can use a simple approximation that is valid at lower frequencies to estimate when the conductor loss becomes excessive. The total loss (S21 in this case) and the associated equations you’ll need are:
In this approximation, the lossless characteristic impedance Z0 is being used to estimate the conductor losses with and without roughness. Note that, according to this approximation, it is being claimed that the dielectric losses do not change with roughness parameters. This is not really true because, as can be seen from the article I linked above, the dielectric constant (including the imaginary part of the dielectric constant) can increase if the roughness increases.
For our purposes we’ll just focus on the conductor losses of bare copper. If you use the skin resistance (Rs) value shown above and the DC resistance, you just need a roughness correction factor value K to get the conductor loss. For a smooth line, we always have K = 1, while for a rough line, you will need to calculate K using a standard roughness model. Below,
I’ve provided some results from two models for comparison (Hammerstad and Cannonball Huray, 4.12 mil dielectric thickness, unmodified Dk = 4.17/Df = 0.014 for smooth copper). The dielectric losses are calculated with the roughness correction applied to the dielectric constant, which will increase the dielectric losses.
The loss increase is striking at high frequencies, although the dielectric loss overcomes the conductor loss by nearly double at 10 GHz. Remember, your DC resistance and skin resistance above are per unit length. Therefore, whatever length unit you use to get these values, that will be the same unit in the dB/length value from the calculation.
Reality is often much more complex than we like to assume in theoretical models, and eventually a relatively complex geometric model like Cannonball-Huray (or any other roughness model) will deviate from reality. If you need to do more modeling of interconnect behavior at high frequencies and you need very accurate values of the roughness correction factor or roughness measurements, then you should get those measurements and use them in your interconnect designs.
One important point here is that you may not need to have perfectly smooth copper on every layer. For example, you could design a hybrid stackup that supports high-speed/high-frequency routing on one layer with smooth copper. All of the other layers may have rough copper, but if those layers only support lower speed signals or lower frequencies, then the copper roughness on those layers won’t matter. Don’t try to over-engineer the board if you don’t need it.
If you want to get accurate characteristic impedance calculations that include roughness values for your PCB copper foil, use the 2D field solver in the Layer Stack Manager in Altium Designer®. The impedance profile you determine for your interconnects can be easily applied to your design rules and will be automatically enforced during routing. Once you’ve completed your PCB and you’re ready to share your designs with collaborators or your manufacturer, you can share your completed designs through the Altium 365™ platform. Everything you need to design and produce advanced electronics can be found in one software package.
We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. Start your free trial of Altium Designer + Altium 365 today.